Level shifter
A level shifter ( 100 ) is presented comprising an input branch ( 102 ) and an output branch ( 104 ). The input branch comprises a first switch ( 130 ), a voltage clamping unit ( 120 ) and a controllable current source ( 110 ) in series. The output branch ( 104 ) comprises a second switch ( 140 ) and a third switch ( 150 ) in series, the second switch ( 140 ) and third switch ( 150 ) having opposite polarities. An output (OUT, 160 ) is provided between the second and the third switch ( 140, 150 ). The current source ( 110 ) is controlled by an input signal (IN) and the output signal (OUT). The first switch ( 130 ) is controlled by the input signal (IN). Switching control terminals ( 122, 124 ) of the second and the third switch are connected on either side of the clamping unit ( 120 ). This reduces voltage swing of switching control units, thus resulting in fast switching, less power consumption and wider voltage ranges. The input branch ( 102 ) draws a current only during level transitions, enabling fast switching and power saving in steady state of the level shifter ( 100 ).
1. A level shifter comprising an input branch arranged to be provided between a first supply node and a second supply node having a first voltage level between them, the first supply node having a higher potential than the second supply node and the input branch comprising in series:
a current source having a first control input for receiving a first input signal and a second control input for receiving an output signal of the level shifter;
a first voltage clamping unit comprising a first clamping terminal and a second clamping terminal for providing a first clamping voltage between the first clamping terminal and the second clamping terminal; and
a first switch having a third control input for receiving a second input signal; and the level shifter further comprising an output branch provided in parallel to the input branch, the output branch comprising in series:
a second switch having a first polarity comprising a first output control input connected to the first clamping terminal; and
a third switch having a second polarity comprising a second output control input connected to the second clamping terminal;
wherein an output terminal is provided between the second switch and the third switch for providing the output signal, and
wherein said current source is configured to provide a current through said voltage clamping unit and to drive a current that controls switching for the second switch and the third switch.
2. The level shifter according to claim 1 , further comprising a second voltage clamping unit for providing a second clamping voltage, such that the first voltage clamping unit and the second voltage clamping unit are provided between the first output control input and the second output control input.
3. The level shifter according to claim 2 , further comprising a fourth switch provided in parallel to the second voltage clamping unit, the fourth switch comprising a third control input for receiving a third control signal.
4. The level shifter according to claim 1 , further comprising a fifth switch provided in parallel to the first clamping unit and the first switch, the fifth switch having a fourth control input for receiving the second control signal.
5. The level shifter according to claim 4 , wherein the fifth switch and the first switch have the same polarity.
6. The level shifter according to claim 1 , wherein the first voltage clamping unit comprises a MOS transistor having gate and drain connected.
7. The level shifter according to claim 1 , further comprising a current control branch comprising connected in series:
a first transistor having gate and drain connected;
a sixth switch controllable by the output signal; and
a seventh switch controllable by the first input signal,
wherein the current source comprises a second transistor having the same polarity as the first transistor and the gate of the second transistor is connected to the gate of the first transistor.
8. The level shifter according to claim 7 wherein the first transistor is of the first polarity and the sixth switch and the seventh switch are transistors of the second polarity.
9. The level shifter according to claim 8 , wherein the first transistor is a PMOS transistor and the sixth switch and the seventh switch are NMOS transistors.
10. The level shifter according to claim 1 , wherein the second switch is a PMOS transistor having the drain connected to the first supply node and the third switch is an NMOS transistor having the drain connected to the second supply node.
11. The level shifter according to claim 1 , wherein:
the first switch is an NMOS transistor having the drain connected to the second supply node and the source connected to the first clamping terminal;
the second clamping terminal is connected to a first current terminal of the current source; and
a second terminal of the current source is connected to the first supply node.
12. The level shifter according to claim 1 , further comprising an inverter circuit having an inverter input and an inverter output, the inverter being arranged to be provided between a third supply node and the second supply voltage node having a second supply voltage between them, the potential of the third supply node being lower than potential of the first supply node and higher than the potential of the second supply node, wherein the inverter circuit is connected to the level shifter such that the first control input is connected to the inverter output and the third control input is connected to the inverter input.
13. A semiconductor integrated circuit comprising:
a first circuit region comprising a first circuit arranged to operate at the second supply voltage,
a second circuit region comprising a second circuit arranged to operate at the first supply voltage; and
the level shifter according to claim 12 , the inverter input being connected to the first circuit and the output terminal being connected to the second circuit.
14. The level shifter according to claim 1 , wherein the second supply voltage is a ground level.
15. A non-transient computer-readable medium comprising an electronic representation of a circuit, the circuit comprising the level shifter according to claim 1 .