IP Library Granted Patent US 10,777,581
Granted Patent B2
US 10,777,581 · App. 15/550,142 · Granted Sep 15, 2020

Method for manufacturing IGZO thin-film transistor

Inventor: Songshan Li (Hubei, CN)
Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
H01L27/1225H01L27/3246H01L29/0847H01L29/41733H01L31/022475
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Quick Facts
Patent No.
US 10,777,581
App. No.
15/550,142
Granted
Sep 15, 2020
Kind
B2
Abstract

A method for manufacturing an IGZO thin-film transistor includes: manufacturing a buffer layer, an active layer, a gate electrode layer, and a gate insulator layer in sequence on a substrate, and performing a patterning process; depositing a transparent insulating metal oxide layer on the patterned buffer layer, the active layer, the gate electrode layer, and the gate insulator layer by sputtering, and annealing the transparent insulating metal oxide layer so as to improve electric properties of a thin-film transistor; depositing a dielectric layer on the transparent insulating metal oxide layer, and patterning the dielectric layer and the transparent insulating metal oxide layer by means of a photolithography process and a dry etch process; depositing S/D (source/drain) contact regions on the dielectric layer; and performing a patterning process.

Claims (29)

1. A method for manufacturing an IGZO (Indium Gallium Zinc Oxide) thin-film transistor, wherein the method comprises the following steps:

step S 101 : manufacturing a buffer layer, an active layer, a gate electrode layer, and a gate insulator layer in sequence on a substrate, and performing a patterning process;

step S 102 : depositing a transparent insulating metal oxide layer on the patterned buffer layer, the active layer, the gate electrode layer, and the gate insulator layer by sputtering, and annealing the transparent insulating metal oxide layer such that aluminum in the transparent insulating metal oxide layer made of alumina is diffused towards a surface of the active layer made of indium gallium zinc oxide;

step S 103 : depositing a dielectric layer on the transparent insulating metal oxide layer, and patterning the dielectric layer and the transparent insulating metal oxide layer by means of a photolithography process and a dry etch process; and

step S 104 : depositing S/D (source/drain) contact regions on the dielectric layer, and performing a patterning process.

2. The method for manufacturing AN IGZO thin-film transistor according to claim 1 , wherein

in step S 102 , the transparent insulating metal oxide layer is diffused towards a surface of the active layer during annealing, for increasing a carrier concentration on the surface of the active layer so that the S/D contact regions become conductive, and conductivity of the S/D contact regions would not be weakened in a subsequent annealing process; and

the transparent insulating metal oxide layer functions as a barrier layer to prevent an influence of water and oxygen on the active layer, thereby improving the electric properties of the thin-film transistor.

3. The method for manufacturing an IGZO thin-film transistor according to claim 2 , wherein a thickness of the transparent insulating metal oxide layer is from 8 nm to 12 nm.

4. The method for manufacturing an IGZO thin-film transistor according to claim 3 , wherein the thickness of the transparent insulating metal oxide layer is 10 nm.

5. The method for manufacturing an IGZO thin-film transistor according to claim 1 , wherein in step S 102 , an annealing temperature is from 280° C. to 320° C.

6. The method for manufacturing an IGZO thin-film transistor according to claim 5 , wherein the annealing temperature is 300° C.

7. The method for manufacturing an IGZO thin-film transistor according to claim 1 , wherein in S 102 , the transparent insulating metal oxide layer is annealed once again.

8. The method for manufacturing an IGZO thin-film transistor according to claim 1 , wherein the method further comprises forming a passivation layer and a planarization layer on the dielectric layer and performing a patterning process to form a first via hole.

9. The method for manufacturing an IGZO thin-film transistor according to claim 8 , wherein the method further comprises:

forming an ITO (Indium Tin Oxide) electrode in the first via hole and a pixel defining layer on the passivation layer and the planarization layer and the ITO electrode, and performing a patterning process to form a second via hole; and

forming an organic light emitting component in the second via hole on the ITO electrode.

10. The method for manufacturing an IGZO thin-film transistor according to claim 2 , wherein in S 102 , the transparent insulating metal oxide layer is annealed once again.

11. The method for manufacturing an IGZO thin-film transistor according to claim 2 , wherein the method further comprises forming a passivation layer and a planarization layer on the dielectric layer and performing a patterning process to form a first via hole.

12. The method for manufacturing an IGZO thin-film transistor according to claim 11 , wherein the method further comprises:

forming an ITO (Indium Tin Oxide) electrode in the first via hole and a pixel defining layer the passivation layer and the planarization layer and the ITO electrode, and performing a patterning process to form a second via hole; and

forming an organic light emitting component in the second via hole on the ITO electrode.

13. The method for manufacturing an IGZO thin-film transistor according to claim 8 , wherein

in step S 102 , the transparent insulating metal oxide layer is diffused towards a surface of the active layer during annealing, for increasing a carrier concentration on the surface of the active layer so that the S/D contact regions become conductive, and conductivity of the S/D contact regions would not be weakened in a subsequent annealing process; and

the transparent insulating metal oxide layer functions as a barrier layer to prevent an influence of water and oxygen on the active layer, thereby improving the electric properties of the thin-film transistor.

14. The method for manufacturing an IGZO thin-film transistor according to claim 9 , wherein the first via hole is defined corresponding to one electrode of S/D electrodes such that the ITO electrode is connected to the one electrode of the S/D electrodes.

15. The method for manufacturing an IGZO thin-film transistor according to claim 9 , wherein the second via hole is defined corresponding to the first via hole such that the organic light emitting component is connected to the ITO electrode.

16. The method for manufacturing an IGZO thin-film transistor according to claim 12 , wherein the first via hole is defined corresponding to one electrode of S/D electrodes such that the ITO electrode is connected to the one electrode of the S/D electrodes.

17. The method for manufacturing an IGZO thin-film transistor according to claim 12 , wherein the second via hole is defined corresponding to the first via hole such that the organic light emitting component is connected to the ITO electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2017
From: LI, SONGSHAN
To: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 043569/0975 →
Priority Claims (1)
CN 2017 1 0418690 · Jun 6, 2017 · national
Continuity (1)
Related Publication 20190386035A1 · Dec 19, 2019