Apparatuses and methods for data movement
The present disclosure includes apparatuses and methods for data movement. An example apparatus comprises a memory device. The memory device includes an array of memory cells and sensing circuitry coupled to the array via a plurality of sense lines. The sensing circuitry includes a sense amplifier and a compute component coupled to a sense line and configured to implement operations. A controller in the memory device is configured to couple to the array and sensing circuitry. A shared I/O line in the memory device is configured to couple a source location and a destination location.
1. An apparatus, comprising:
a memory device, comprising:
an array of memory cells;
sensing circuitry coupled to the array via a plurality of sense lines, the sensing circuitry including a sense amplifier and a compute component coupled to a sense line and configured to implement operations;
a controller configured to couple to the array and sensing circuitry; and
a shared I/O line configured to couple a source location to a destination location.
2. The apparatus of claim 1 , wherein the apparatus is configured to:
move data from the source location using a first number of sense amplifiers and compute components coupled to the shared I/O line; and
move the data to the destination location using a second number of sense amplifiers and compute components coupled to the shared I/O line.
3. The apparatus of claim 1 , wherein the apparatus further comprises a plurality of sense amplifiers and compute components in the source location configured to couple to the shared I/O line.
4. The apparatus of claim 3 , wherein a number of shared I/O lines formed in the array is configured by division of a number of columns in the array by a number of the plurality of sense amplifiers and compute components coupled to the shared I/O line.
5. The apparatus of claim 1 , wherein 2048 shared I/O lines are configured as a 2048 bit wide shared I/O line.
6. The apparatus of claim 1 , wherein the sensing circuitry comprises;
a sense amplifier selectably coupled to each of the pair of complementary sense lines; and
a compute component coupled to the sense amplifier.
7. The apparatus of claim 1 , wherein the apparatus further comprises:
a plurality of sense amplifiers and compute components; and
a multiplexer to select a sense amplifier and a compute component to couple to the shared I/O line.
8. An apparatus, comprising:
a controller coupled to a memory device, wherein the memory device comprises:
a plurality of subarrays of memory cells;
sensing circuitry coupled to the plurality of subarrays via a plurality of columns of the memory cells, the sensing circuitry including a sense amplifier and a compute component coupled to each of the columns and configured to implement a command to move the data; and
a shared I/O line to couple the source location and the destination location to move the data; and
wherein the controller is configured to couple to the plurality of subarrays and the sensing circuitry to perform a data write operation on the moved data to the destination location.
9. The apparatus of claim 8 , wherein the apparatus further comprises:
a sensing component stripe configured to include a number of a plurality of sense amplifiers and compute components that corresponds to a number of the plurality of columns of the memory cells; and
wherein the number of sense amplifiers and compute components is selectably coupled to the shared I/O line.
10. The apparatus of claim 8 , wherein a number of a plurality of sensing component stripes in a bank corresponds to a number of the plurality of subarrays in the bank.
11. The apparatus of claim 8 , wherein the apparatus further comprises column select circuitry to selectably sense data in a particular column of memory cells of a subarray by being selectably coupled to a plurality of sense amplifiers and compute components in the source location.
12. The apparatus of claim 8 , wherein the apparatus further comprises:
a source sensing component stripe including a number of sense amplifiers and compute components configured to send an amount of data sensed from a row of the source location in parallel to a plurality of shared I/O lines; and
wherein the amount of data corresponds to at least a thousand bit width of the plurality of shared I/O lines.
13. The apparatus of claim 8 , wherein a number of a plurality of shared I/O lines corresponds to a number of bits wide shared I/O line.
14. The apparatus of claim 8 , wherein the apparatus further comprises:
a source sensing component stripe including a number of sense amplifiers and compute components configured to store data sensed from a row of the source location when an amount of sensed data exceeds at least a thousand bit width of a plurality of the shared I/O lines; and
the source sensing component stripe is configured to send the data sensed from the row of the source location when coupled to the plurality of shared I/O lines as a plurality of subsets; and
wherein an amount of at least a first subset of the data corresponds to the at least a thousand bit width of the plurality of shared I/O lines.
15. The apparatus of claim 8 , wherein controller is configured to move the data from a selected row and a selected sense line in the source location to a selected row and a selected sense line in the destination location via the shared I/O line.
16. The apparatus of claim 15 , wherein a location of the data of the selected row and the selected sense line in a source subarray is different from a location of the data moved to a selected row and a selected source line in a destination subarray.
17. The apparatus of claim 8 , wherein the apparatus further comprises a destination sensing component stripe including a plurality of sense amplifiers and compute components configured to selectably receive the data from one of a plurality of coupled shared I/O lines.
18. The apparatus of claim 17 , wherein the controller is configured to:
write an amount of data selectably received by the plurality of sense amplifiers and compute components in the destination sensing component stripe to a selected row and selected sense lines of the destination location in a destination subarray; and
wherein the amount of data corresponds to at least a thousand bit width of a plurality of the shared I/O lines.
19. The apparatus of claim 8 , wherein the apparatus further comprises a destination sensing component stripe including a plurality of sense amplifiers and compute components configured to store received data when an amount of the received data exceeds at least a thousand bit width of a plurality of the shared I/O lines.
20. The apparatus of claim 19 , wherein the controller is configured to:
write the stored data to a selected row and a plurality of selected sense lines in the destination location as a plurality of subsets; and
wherein an amount of at least a first subset of the written data corresponds to the at least a thousand bit width of the plurality of shared I/O lines.
21. The apparatus of claim 19 , wherein the controller is configured to write the stored data to a selected row and a plurality of selected sense lines in the destination location as a single set.