IP Library Granted Patent US 11,011,531
Granted Patent B2
US 11,011,531 · App. 15/555,046 · Granted May 18, 2021

Replacement control gate methods and apparatuses

Inventor: Luan C. Tran (Meridian, ID)
Assignee: Micron Technology, Inc.
H01L27/11556H01L21/02244H01L27/1157H01L27/11524H01L27/11565H01L27/11582H01L29/40114H01L29/42328H01L29/7883
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Quick Facts
Patent No.
US 11,011,531
App. No.
15/555,046
Granted
May 18, 2021
Kind
B2
Abstract

Disclosed are memory structures and methods for forming such structures. An example method forms a vertical string of memory cells by forming an opening in interleaved tiers of dielectric tier material and nitride tier material, forming a charge storage material over sidewalls of the opening and recesses in the opening to form respective charge storage structures within the recesses. Subsequently, and separate from the formation of the floating gate structures, at least a portion of the remaining nitride tier material is removed to produce control gate recesses, each adjacent a respective charge storage structure. A control gate is formed in each control gate recess, and the control gate is separated from the charge storage structure by a dielectric structure. In some examples, these dielectric structures are also formed separately from the charge storage structures.

Claims (67)

1. A method comprising:

forming an opening extending through multiple tiers of dielectric tier material vertically separated, at least in part, by tiers of nitride tier material, and having a sidewall defined, at least in part, by such tiers;

forming lateral recesses in the tiers of nitride tier material surrounding the opening;

forming a charge storage structure material over the sidewall of the opening and in the recesses to form charge storage structures within the lateral recesses in the tiers of nitride tier material, the sidewall including a sidewall portion between the tiers of nitride tier material, and forming the charge storage material including forming a portion of the charge storage material over the sidewall portion between the tiers of nitride tier material;

forming a dielectric material in the opening including forming a portion of the dielectric material over the sidewall portion between the tiers of nitride tier material, wherein forming the dielectric material comprises:

oxidizing a portion of the charge storage material such that the oxidation consumes the portion of the charge storage material to form an oxide,

removing the oxidized portion of the charge storage material leaving some charge storage material over the sidewalls of the opening, and

oxidizing the remaining charge storage material over the sidewalls to form a tunnel oxide;

forming pillar material over at least a portion of the dielectric material within the opening; and

forming control gates, wherein the forming of the control gates comprises,

removing at least portions of the nitride tier material to produce a respective control gate recess adjacent each of the charge storage structures;

forming a dielectric structure in each of the control gate recesses, wherein the dielectric structures are formed separately from the charge storage structures; and

forming a control gate in each of the control gate recesses, wherein each of the control gates is separated from an adjacent charge storage structure by a respective dielectric structure.

2. The method of claim 1 , further comprising forming the tiers of dielectric tier material and nitride tier material over a tier of source select gate material.

3. The method of claim 2 , wherein forming the dielectric material over the sidewall of the opening further comprises forming a gate dielectric material on a source select gate device.

4. The method of claim 2 , wherein forming the dielectric material over the sidewall of the opening further comprises forming a gate dielectric material on a drain select gate device.

5. The method of claim 1 , wherein multiple openings extending through the multiple tiers of dielectric tier material and tiers of nitride tier material are formed; wherein forming the control gates further comprises:

forming a trench in the tiers of dielectric material and nitride material prior to removing the at least portions of the nitride tier material, wherein surfaces of the tiers of dielectric material and of the nitride material form at least a portion of the sidewalls defining the trench, and wherein the trench separates a first group of openings from a second group of openings;

reducing a thickness of each of the dielectric material tiers to enlarge the control gate recesses;

wherein forming the dielectric structure in the control gate recesses comprises, forming a first oxide material in the trench and in the control gate recesses adjacent the charge storage structures;

forming a nitride material over the first oxide material; and

forming a second oxide material over the nitride material; and

wherein forming a control gate in each of the control gate recesses comprises forming a control gate material over the second oxide material.

6. The method of claim 5 , further comprising removing the first oxide material, the nitride material, the second oxide material, and the control gate material from the sidewalk of the trench.

7. A method comprising:

forming an opening extending through multiple tiers of dielectric tier material vertically separated, at least in part, by tiers of nitride tier material, and having a sidewall defined, at least in part, by such tiers;

forming lateral recesses in the tiers of nitride tier material surrounding the opening;

forming a charge storage structure material over the sidewall of the opening and in the recesses to form charge storage structures within the lateral recesses in the tiers of nitride tier material;

forming a dielectric material over the sidewall of the opening;

forming pillar material over at least a portion of the dielectric material within the opening; and

forming control gates, wherein the forming of the control gates comprises,

removing at least portions of the nitride tier material to produce a respective control gate recess adjacent each of the charge storage structures;

forming a dielectric structure in each of the control gate recesses, wherein the dielectric structures are formed separately from the charge storage structures; and

forming a control gate in each of the control gate recesses, wherein each of the control gates is separated from an adjacent charge storage structure by a respective dielectric structure, wherein forming the dielectric material over the sidewall of the opening comprises:

forming a sacrificial oxide from the charge storage material, wherein the sacrificial e consumes less than all of the charge storage material over the sidewall of the opening;

removing the sacrificial oxide from the sidewall; and

oxidizing the remaining charge material over the sidewall to fort a tunnel oxide.

8. The method of claim 1 , further comprising forming a drain select gate material over the tiers of dielectric tier material and nitride tier material.

9. The method of claim 1 , wherein the charge storage structures are floating gates.

10. The method of claim 1 , wherein the charge storage structures comprise polysilicon.

11. The method of claim 1 , wherein the control gates comprise one or more of polysilicon, metal, and metal nano dots.

12. The method of claim 11 , wherein the metal comprises tungsten, titanium, or tantalum.

13. A method comprising:

forming source select gate (SGS) material over a substrate;

forming interleaved tiers of dielectric material and nitride material over the SGS material;

forming drain select gate (SGD) material over the interleaved tiers of dielectric material and nitride material;

forming an opening through the SGD material, the interleaved tiers of dielectric material and nitride material, and the SGS material, the interleaved tiers and the SGS material forming at least a portion of a sidewall defining the opening;

forming a recess in the opening in each of the tiers of nitride material;

forming a floating gate material over the sidewall of the opening and the recesses to form a floating gate within each of the recesses, the sidewall including a sidewall portion between the tiers of nitride material, and forming the floating gate material including forming a portion of the floating gate material over the sidewall portion between the tiers of nitride material;

forming a dielectric over the sidewall including forming a portion of the dielectric over the sidewall portion between the tiers of nitride material, wherein forming dielectric over the sidewall comprises:

forming a sacrificial oxide over the floating gate material, wherein the sacrificial oxide consumes only a portion of thickness of the floating gate material over the sidewall and leaves portions of the floating gate material in the recesses,

removing the sacrificial oxide, and

oxidizing the remaining floating gate material over the sidewall to form a tunnel oxide over the sidewall and over remaining floating gate material in each recess;

forming a pillar material over the dielectric;

removing at least portions of the nitride material tiers to produce a control gate recess adjacent to each floating gate; and

forming a control gate in each control gate recess wherein each control gate is separated from a respective floating gate by a dielectric structure.

14. The method of claim 13 , further comprising forming a dielectric over the pillar material to fill a void within the pillar material.

15. The method of claim 14 , further comprising:

forming a recess in a top of the pillar dielectric material such that a portion of the pillar material is exposed;

forming a plug material in the recess of the top of the pillar dielectric material; and

forming a protective oxide over the drain select gate (SGD) material and the plug material.

16. The method of claim 14 , wherein the dielectric structure comprises a multi-component dielectric structure that is formed separately and from the floating gate.

17. The method of claim 13 , wherein forming the source select gate material over the substrate comprises:

forming a common source node material over the substrate;

forming an isolating dielectric material over the common source node material; and

forming the source select gate material over the isolating dielectric material.

18. The method of claim 17 , further comprising removing a portion of the isolating dielectric material from within the opening prior to forming the pillar material such that the pillar material contacts the common source node.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2020
From: TRAN, LUAN C.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 054420/0211 →
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →
Continuity (2)
Provisional Application 62134338 · Mar 17, 2015
Related Publication 20180040624A1 · Feb 8, 2018