Mirror plate for a fabry-perot interferometer and a fabry-perot interferometer
A method for producing a mirror plate for a Fabry-Perot interferometer includes providing a substrate, which includes silicon, implementing a semi-transparent reflective coating on the substrate, forming a passivated region in and/or on the substrate by etching a plurality of voids in the substrate, and by passivating the surfaces of the voids, forming a first sensor electrode on top of the passivated region, and forming a second sensor electrode supported by the substrate.
1. A method for producing a mirror plate for a Fabry-Perot interferometer, the method comprising:
providing a substrate, which comprises silicon,
implementing a semi-transparent reflective coating on the substrate,
forming a passivated region in and/or on the substrate by etching a plurality of voids in the substrate, and by passivating the surfaces of the voids,
forming a first sensor electrode on top of the passivated region, and
forming a second sensor electrode supported by the substrate,
wherein the total surface area of the voids is greater than 5 times the projected area of the passivated region.
2. The method of claim 1 , wherein forming the passivated region comprises:
forming a plurality of voids in the substrate by etching, and
forming insulating material on the surfaces of the voids.
3. The method according to claim 1 , wherein forming the passivated region comprises:
forming a plurality of voids in the substrate by etching, and
oxidizing the surfaces of the voids.
4. The method according to claim 1 , wherein forming the passivated region comprises:
forming a plurality of voids in the substrate by etching, and
depositing insulating material on the surfaces of the voids.
5. The method according to claim 1 , wherein the passivated region comprises passivated porous silicon, and forming the passivated region comprises:
converting silicon into porous silicon by etching, and
passivating surfaces of the pores of the porous silicon.
6. The method according to claim 1 , wherein the inner widths of the voids are smaller than 100 μm in a transverse direction.
7. The method according to claim 1 , wherein the widths of the walls between the voids are smaller than 100 μm in a transverse direction.
8. The method according to claim 1 , wherein the voids are grooves, holes, channels and/or pores.
9. The method according to claim 1 , wherein the thickness of the passivated region is greater than 10 μm.
10. The method according to claim 1 , wherein the electrical conductivity of the passivated region is lower than 20% of the electrical conductivity of the silicon of the substrate at the temperature of 25° C.
11. A mirror plate for a Fabry-Perot interferometer, the mirror plate comprising:
a substrate, which comprises silicon,
a semi-transparent reflective coating implemented on the substrate,
a passivated region comprising a passivated three-dimensional structure formed in and/or on the substrate by etching and passivation,
a first sensor electrode formed on top of the passivated region, and
a second sensor electrode supported by the substrate,
wherein the thickness of the passivated region has been selected such that the thermally induced change of reactance between the first sensor electrode and the second sensor electrode is smaller that 0.1% of a reference value when the temperature of the substrate is changed by 1° C. wherein the reactance is determined at the frequency of 10 kHz, and the reference value is calculated according to the following equation:
X
REF
=
1
2
π
·
10
kHz
·
(
ɛ
·
A
50
µ
m
)
where ε denotes the dielectric permittivity of vacuum, and A denotes the area of the first sensor electrode.
12. The mirror plate of claim 11 wherein the passivated region comprises passivated porous silicon.
13. The mirror plate of claim 11 , wherein the passivated region comprises a conformally coated microstructured silicon matrix.
14. A Fabry-Perot interferometer, which comprises a first mirror plate and a second mirror plate, the first mirror plate comprising:
a substrate, which comprises silicon (Si),
a semi-transparent reflective coating implemented on the substrate,
a passivated region comprising a passivated three-dimensional structure formed in and/or on the substrate by etching and passivation,
a first sensor electrode formed on top of the passivated region, and
a second sensor electrode supported by the substrate,
the second mirror plate comprising a third sensor electrode and a fourth sensor electrode such that the first sensor electrode and the third sensor electrode form a first sensor capacitor, the second sensor electrode and the fourth sensor electrode form a second sensor capacitor, the capacitance of the first sensor capacitor is indicative of the mirror gap of the Fabry-Perot interferometer.
15. The interferometer of claim 14 wherein the thickness of the passivated region has been selected such that thermally induced relative change of reactance (between the first sensor electrode and the second sensor electrode is smaller than 0.1% when the temperature of the substrate is changed by 1° C.
16. The interferometer of claim 14 comprising a plurality of sensor electrodes, which are arranged to monitor the alignment of the second mirror plate with respect to the first mirror plate.
17. A method for producing a mirror plate for a Fabry-Perot interferometer, the method comprising:
providing a substrate, which comprises silicon,
implementing a semi-transparent reflective coating on the substrate,
forming a passivated region in and/or on the substrate by etching a plurality of voids in the substrate, and by passivating the surfaces of the voids,
forming a first sensor electrode on top of the passivated region, and
forming a second sensor electrode supported by the substrate,
wherein the electrical conductivity of the passivated region is lower than 20% of the electrical conductivity of the silicon of the substrate at the temperature of 25° C.
18. The method of claim 17 , wherein the inner widths of the voids are smaller than 100 μm in a transverse direction.
19. The method of claim 17 , wherein the widths of the walls between the voids are smaller than 100 μm in a transverse direction.
20. The method of claim 17 , wherein the thickness of the passivated region is greater than 10 μm.