IP Library › Granted Patent US 10,297,666
Granted Patent B2
US 10,297,666 · App. 15/564,389 · Granted May 21, 2019

Semiconductor device with a well region

Inventors: Kohei Ebihara (Tokyo, JP); Hiroshi Watanabe (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H01L29/1608H01L23/24H01L23/3185H01L29/0619H01L29/402H01L29/78H01L29/8611H01L29/872H01L23/3171H01L29/7395H01L2924/01014H01L2924/10253H05K2201/0154
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Quick Facts
Patent No.
US 10,297,666
App. No.
15/564,389
Granted
May 21, 2019
Kind
B2
Abstract

Supposing x is defined as a position of an end of a depletion layer extending when a rated voltage V [V] is applied to a rear surface electrode, W 1 is defined as a distance between the position x and an outer peripheral edge of a surface electrode in an outer peripheral direction, W 2 is defined as a distance between the position x and an outer peripheral edge of a field insulating film in the outer peripheral direction, t [μm] is defined as a film thickness t [μm] of the field insulating film, a layout of a terminal part is defined so that an electrical field in the field insulating film at the position x expressed as W 2 V/t(W 1 +W 2 ) is 3 MV/cm or smaller.

Claims (31)

1. A semiconductor device, comprising:

a semiconductor substrate;

a semiconductor layer of a first conductivity type being formed on said semiconductor substrate;

a field insulating film being formed on a surface of said semiconductor layer;

a surface electrode being formed on said surface of said semiconductor layer within an inner periphery of said field insulating film and extending onto said field insulating film;

a well region of a second conductivity type being formed at a surface-layer part of said semiconductor layer in contact with said surface electrode and extending outward beyond an outer peripheral edge of said surface electrode;

a surface protective film being made of an insulating material and formed on said surface electrode and said field insulating film to cover an outer peripheral edge of said surface electrode and an outer peripheral edge of said field insulating film;

a sealing gel being formed, on said semiconductor layer and said surface protective film, on an outer peripheral part of said semiconductor layer; and

a rear surface electrode formed on a rear surface of said semiconductor substrate, wherein

x is defined as a position, at a surface between the semiconductor layer and the field insulating film, of an end of a depletion layer extending from said well region toward an outer peripheral direction of said semiconductor layer on said surface of said semiconductor layer when a rated voltage V [V] is applied to said rear surface electrode,

W 1 is defined as a distance between said position x and said outer peripheral edge of said surface electrode in said outer peripheral direction,

W 2 is defined as a distance between said position x and said outer peripheral edge of said field insulating film in said outer peripheral direction,

t [μm] is defined as a film thickness of said field insulating film, and

a layout of a terminal part is defined so that an electrical field in said field insulating film at said position x expressed as W 2 V/t(W 1 +W 2 ) is 3 MV/cm or smaller.

2. The semiconductor device according to claim 1 , wherein

said field insulating film mainly contains silicon oxide.

3. The semiconductor device according to claim 1 , wherein

said surface protective film is polyimide.

4. The semiconductor device according to claim 1 , wherein

said gel is a silicone gel.

5. The semiconductor device according to claim 1 , wherein

said surface electrode is Schottky-connected to said semiconductor layer.

6. The semiconductor device according to claim 1 , wherein

said well region at said surface-layer part of said semiconductor layer includes a terminal well region of a second conductivity type formed in a terminal part and an active well region of a second conductivity type provided in an active region to be separated from said terminal well region, and

said surface electrode is ohmic-connected to said well region.

7. The semiconductor device according to claim 1 , further comprising

a plurality of separate well regions which are separated from each other and arranged outside said well region, in addition to said well region.

8. The semiconductor device according to claim 1 , wherein

said semiconductor substrate and said semiconductor layer are made of a wide band gap semiconductor material.

9. The semiconductor device according to claim 1 , wherein

each of said semiconductor substrate and said semiconductor layer is made of a silicon carbide semiconductor material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 4, 2017
From: EBIHARA, KOHEI; WATANABE, HIROSHI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 043783/0376 →
Continuity (1)
Related Publication 20180138272A1 · May 17, 2018