IP Library › Granted Patent US 10,253,429
Granted Patent B2
US 10,253,429 · App. 15/568,158 · Granted Apr 9, 2019

Method for manufacturing epitaxial silicon wafer

Inventors: Naoya Nonaka (Tokyo, JP); Tadashi Kawashima (Tokyo, JP)
Assignee: SUMCO CORPORATION
C30B25/186C30B25/20C30B29/06C30B33/02C30B33/12H01L21/02019H01L21/0262H01L21/02381H01L21/02532H01L21/02576H01L21/02658H01L21/324
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Quick Facts
Patent No.
US 10,253,429
App. No.
15/568,158
Granted
Apr 9, 2019
Kind
B2
Abstract

A method includes: a step of forming an oxide film on a backside of a silicon wafer; a step of removing the oxide film present at an outer periphery of the silicon wafer; a step of argon annealing in which a heat treatment is performed in an argon gas atmosphere; and a step of forming an epitaxial film on a surface of the silicon wafer, the step of forming the epitaxial film including: a step of pre-baking in which the silicon wafer is subjected to a heat treatment in an gas atmosphere containing hydrogen and hydrogen chloride to etch an outer layer of the silicon wafer; and a step of growing the epitaxial film on the surface of the silicon wafer.

Claims (13)

1. A manufacturing method of an epitaxial silicon wafer comprising a silicon wafer doped with phosphorus and an epitaxial film provided on a surface of the silicon wafer, the method comprising:

forming an oxide film on a backside of the silicon wafer cut out from a single crystal ingot prepared by a Czochralski process;

removing the oxide film present at an outer periphery of the silicon wafer;

argon annealing wherein the silicon wafer is subjected to a heat treatment in an argon gas atmosphere after the removing of the oxide film to make clusters present on an outer layer of the silicon wafer into a solid solution; and

forming the epitaxial film on the surface of the silicon wafer after the argon annealing, the forming of the epitaxial film comprising:

pre-baking wherein the silicon wafer is subjected to a heat treatment in a gas atmosphere comprising hydrogen and hydrogen chloride to etch the outer layer of the silicon wafer so that an allowance of the outer layer of the silicon wafer is smaller than a thickness of the outer layer where the clusters are made into the solid solution in the argon annealing; and

growing the epitaxial film on the surface of the silicon wafer after the pre-baking.

2. The manufacturing method of the epitaxial silicon wafer according to claim 1 , wherein the outer layer to be etched in the pre-baking has a thickness ranging from 100 nm to 300 nm.

3. The manufacturing method of the epitaxial silicon wafer according to claim 1 , wherein

the heat treatment in the argon annealing is performed in the argon gas atmosphere at a temperature ranging from 1150 degrees C. to 1250 degrees C., and

the heat treatment in the pre-baking is performed in the gas atmosphere comprising hydrogen and hydrogen chloride at a temperature ranging from 1050 degrees C. to 1250 degrees C.

4. The manufacturing method of the epitaxial silicon wafer according to claim 1 , wherein the epitaxial film is grown at a temperature ranging from 1050 degrees C. to 1150 degrees C. in the growing of the epitaxial film.

5. The manufacturing method of the epitaxial silicon wafer according to claim 1 , wherein a resistivity of the silicon wafer is 1.5 mΩ·cm or less.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2017
From: NONAKA, NAOYA; KAWASHIMA, TADASHI
To: SUMCO CORPORATION
Reel/Frame 043913/0973 →
Priority Claims (1)
JP 2015-092805 · Apr 30, 2015 · national
Continuity (1)
Related Publication 20180087184A1 · Mar 29, 2018
Cited By (2)
US 12,308,228 US 12,622,185