Systems and methods for spectrally efficient and energy efficient ultra-wideband impulse radios and scalable data rates
Ultra-Wideband (UWB) technology exploits modulated coded impulses over a wide frequency spectrum with very low power over a short distance for digital data transmission. Today's leading edge modulated sinusoidal wave wireless communication standards and systems achieve power efficiencies of 50 nJ/bit employing narrowband signaling schemes and traditional RF transceiver architectures. However, such designs severely limit the achievable energy efficiency, especially at lower data rates such as below 1 Mbps. Further, it is important that peak power consumption is supportable by common battery or energy harvesting technologies and long term power consumption neither leads to limited battery lifetimes or an inability for alternate energy sources to sustain them. Accordingly, it would be beneficial for next generation applications to exploit inventive transceiver structures and communication schemes in order to achieve the sub nJ per bit energy efficiencies required by next generation applications.
1. A system for wireless communication comprising:
an ultra-wideband (UWB) transmitter for transmitting data; and
an ultra-wideband (UWB) receiver for receiving data; wherein
the UWB receiver comprises a receiver circuit comprising:
a first squaring circuit down-converts a received pulse to a down-converted frequency range;
a high pass filter removes at least DC content from the down-converted frequency range; and
a second squaring circuit which employs the entire down-converted pulse energy after the high pass filter to increase the probability of detection;
synchronization of at least one of the UWB transmitter and the UWB receiver is established via dedicated synchronization hardware within the electronic device which includes a dual clock timer system; wherein
the dual clock timer system provides ultra-low power consumption during a sleep mode of the at least one of the transmitter and the receiver;
the dual clock timer system comprises a low frequency clock and a base clock generated from the low frequency clock equal to the rate that symbols are processed by at least one of the UWB transmitter and UWB receiver during operation; and
only the low frequency clock of the dual clock timer system is powered during the sleep mode.
2. The system according to claim 1 , wherein
the UWB transmitter and UWB receiver each form part of a common transceiver or separate transceivers and the receiver comprises:
an integrated DC/DC converter; and
a duty cycled transceiver circuit, wherein
the transceiver supports at least one of fast circuit start-up and fast circuit shut-down to achieve low power consumption for data rate variations of at least one of 2 orders of magnitude, 3 orders of magnitude, 4 orders of magnitude and greater than 4 orders of magnitude.
3. The system according to claim 1 , wherein
each bit of data is encoded as a pulse bundle comprising multiple pulses per bundle that have real-time configurable parameters for the pulses within each multiple pulse bundle of at least one of phase, frequency, amplitude and bandwidth.
4. The system according to claim 3 , wherein
the pulse bundle is one of a plurality of pulse bundles wherein these dynamically fill the UWB spectrum in order to at least one of:
achieve robust communications in the presence of channel and multipath fading;
allow for optimal spectrum shaping and whitening to dynamically meet indoor and outdoor standard UWB requirements;
allow the impulse radio to conform to the different radiated power emission masks imposed by region/country specific regulatory bodies;
allow for different pulse bundle schemes to cover multiple data rates and range requirements;
allow for a very wide bandwidth without resorting to ultra-narrow pulses that have very wide bandwidths thus simplifying the circuitry and increasing the energy efficiency;
spread pulse energy over a practical time scale for receiver duty cycling and synchronization while simultaneously occupying a wide spectral bandwidth; and
reduce spectral sidelobes for easier compliance with emission spectral masks.
5. The system according to claim 1 , wherein
the UWB receiver comprises:
an intermediate frequency (IF) chain that utilizes an instantaneous bandwidth that is on the order of an individual pulse bandwidth whilst the total spectrum covers a much wider bandwidth by exploiting a pulse bundle per bit; wherein
a pulse bundle comprises multiple pulses per bundle that have real-time configurable parameters for the pulses within each multiple pulse bundle of at least one of phase, frequency, and bandwidth.
6. The system according to claim 5 , wherein
the receiver's IF chain comprises circuit blocks after pulse down-conversion have low power consumption whilst providing an ultra-wide bandwidth spectrum to be used for communications.
7. The system according to claim 1 , wherein
the receiver comprises:
an intermedia frequency (IF) receiver stage comprising at least two stages of down-conversion; and
at least one of a high pass and a band-pass filter disposed between each pair of stages of the at least two stages of down-conversion,
wherein the first stage of each pair of stages of the at least two stages of down-conversion is a squaring stage that translates that an input RF signal spectrum at its input to an output RF signal spectrum that extends down to DC.
8. The system according to claim 7 , wherein
the IF receiver stage at least one of:
removes a DC offset problem within the receiver,
reduce 1/f noise of the RF section of the receiver, and
rejects narrowband interference through combining a first stage with a filter.
9. The system according to claim 7 , wherein
the IF receiver stage further comprises at least one of:
high pass decoupling capacitors, the capacitance of the capacitors established in dependence upon a predetermined amount of the desired pulse energy to be cut-off during this processing; and
a second squaring stage as the at least second stage of the at least two stages of down-conversion, wherein the resultant IF receiver stage retains full sensitivity.
10. The system according to claim 1 , wherein
the transmitter employs shaped Gaussian RF pulses, the shaped Gaussian RF pulses being generated by applying pulses to a power amplifier and dynamically adjusting the ground connection of the power amplifier during each pulse according to a predetermined temporal characteristic.
11. The system according to claim 10 , wherein
the UWB transmitter employs at least one of:
aggressive power cycling; and
power cycling at the per-pulse level wherein each bit is transmitted as a pulse bundle.
12. The system according to claim 10 , wherein
the UWB transmitter comprises a voltage controlled oscillator that uses pre-charging of nodes to at least one of enforce its start-up phase and to control the polarity of the pulses from the voltage controlled oscillator.
13. The system according to claim 1 , wherein
the receiver employs a synchronization circuit comprising:
a pair of parallel analog-to-digital convert/integrator structures, wherein
the synchronization circuit achieves at least one of faster synchronization and enhanced interference detection.
14. The system according to claim 13 , wherein
the synchronization provides full signal observability during the receive timeframe is supported.
15. The system according to claim 13 , wherein
the synchronization circuit supports dynamic changing of a modulation scheme to improve robustness of communications based on the channel or regulatory environment.
16. The system according to claim 1 , wherein
the modulation schemes supported are on-off keying and pulse position modulation.
17. The system according to claim 1 , further comprising
a baseband transceiver employing a multiphase clock.
18. The system according to claim 1 , wherein
the receiver comprises a receiver circuit comprising a double squaring circuit for enhancing at least one of the energy detection sensitivity and the noise rejection performance of a receiver comprising the receiver circuit and generating a rectified output signal.
19. A system for wireless communication comprising:
an ultra-wideband (UWB) transmitter for transmitting data; and
an ultra-wideband (UWB) receiver for receiving data; wherein
the UWB receiver comprises a receiver circuit comprising:
a first squaring circuit down-converts a received pulse to a down-converted frequency range;
a high pass filter removes at least DC content from the down-converted frequency range; and
a second squaring circuit which employs the entire down-converted pulse energy after the high pass filter to increase the probability of detection;
the UWB transmitter and UWB receiver each form part of a common transceiver or separate transceivers;
the UWB receiver further receiver comprises:
an integrated DC/DC converter; and
a duty cycled transceiver circuit, wherein
either the common the transceiver or the separate transceivers support at least one of fast circuit start-up and fast circuit shut-down to achieve low power consumption for data rate variations of at least one of 2 orders of magnitude, 3 orders of magnitude, 4 orders of magnitude and greater than 4 orders of magnitude.
20. A system for wireless communication comprising:
an ultra-wideband (UWB) transmitter for transmitting data; and
an ultra-wideband (UWB) receiver for receiving data; wherein
the UWB receiver comprises a receiver circuit comprising:
a first squaring circuit down-converts a received pulse to a down-converted frequency range;
a high pass filter removes at least DC content from the down-converted frequency range; and
a second squaring circuit which employs the entire down-converted pulse energy after the high pass filter to increase the probability of detection;
the UWB receiver comprises an intermediate frequency (IF) chain that utilizes an instantaneous bandwidth that is on the order of an individual pulse bandwidth whilst the total spectrum covers a much wider bandwidth by exploiting a pulse bundle per bit; and
a pulse bundle comprises multiple pulses per bundle that have real-time configurable parameters for the pulses within each multiple pulse bundle of at least one of phase, frequency, and bandwidth.
21. The system according to claim 20 , wherein
the receiver's IF chain comprises circuit blocks after pulse down-conversion have low power consumption whilst providing an ultra-wide bandwidth spectrum to be used for communications.
22. A system for wireless communication comprising:
an ultra-wideband (UWB) transmitter for transmitting data; and
an ultra-wideband (UWB) receiver for receiving data; wherein
the UWB receiver comprises a receiver circuit comprising:
a first squaring circuit down-converts a received pulse to a down-converted frequency range;
a high pass filter removes at least DC content from the down-converted frequency range; and
a second squaring circuit which employs the entire down-converted pulse energy after the high pass filter to increase the probability of detection;
the UWB receiver comprises:
an intermedia frequency (IF) receiver stage comprising at least two stages of down-conversion; and
at least one of a high pass and a band-pass filter disposed between each pair of stages of the at least two stages of down-conversion, and
the first stage of each pair of stages of the at least two stages of down-conversion is a squaring stage that translates that an input RF signal spectrum at its input to an output RF signal spectrum that extends down to DC.
23. The system according to claim 22 , wherein
the IF receiver stage at least one of:
removes a DC offset problem within the receiver,
reduce 1/f noise of the RF section of the receiver, and
rejects narrowband interference through combining a first stage with a filter.
24. The system according to claim 22 , wherein
the IF receiver stage further comprises at least one of:
high pass decoupling capacitors, the capacitance of the capacitors established in dependence upon a predetermined amount of the desired pulse energy to be cut-off during this processing; and
a second squaring stage as the at least second stage of the at least two stages of down-conversion, wherein the resultant IF receiver stage retains full sensitivity.
25. A system for wireless communication comprising:
an ultra-wideband (UWB) transmitter for transmitting data; and
an ultra-wideband (UWB) receiver for receiving data; wherein
the UWB receiver comprises a receiver circuit comprising:
a first squaring circuit down-converts a received pulse to a down-converted frequency range;
a high pass filter removes at least DC content from the down-converted frequency range; and
a second squaring circuit which employs the entire down-converted pulse energy after the high pass filter to increase the probability of detection; and
the UWB receiver employs a synchronization circuit comprising a pair of parallel analog-to-digital convert/integrator structures wherein the synchronization circuit achieves at least one of faster synchronization and enhanced interference detection.
26. The system according to claim 25 , wherein
the synchronization provides full signal observability during the receive timeframe is supported.
27. The system according to claim 25 , wherein
the synchronization circuit supports dynamic changing of a modulation scheme to improve robustness of communications based on the channel or regulatory environment.