Vertical junctionless transistor devices

1. A semiconductor device, comprising:

a silicon (Si) substrate;

a silicon germanium (SiGe) layer including a lower portion extending over the silicon substrate and a fin structure protruding above the lower portion;

a first dielectric layer disposed over a side surface of the fin structure and a top surface of the lower portion of the silicon germanium (SiGe) layer;

an indium gallium arsenide (InGaAs) layer disposed over a surface of the first dielectric layer;

a high k oxide layer disposed over a surface of the InGaAs layer;

a metal layer disposed over a surface of the high k oxide layer;

wherein:

the InGaAs layer includes a source region, a channel region, and a drain region,

the metal layer is configured to be a first gate electrode, and

the fin structure in the SiGe layer is configured to be a second gate electrode.

2. The device of claim 1 , wherein the InGaAs layer comprises a single crystalline layer.

3. The device of claim 1 , wherein the fin structure has an elliptical cross-section.

4. The device of claim 1 , wherein the fin structure has a rectangular cross-section.

5. A semiconductor device, comprising:

a substrate;

a first semiconductor layer including a lower portion extending over the substrate and a fin structure protruding above the lower portion;

a first dielectric layer disposed over a side surface of the fin structure and a top surface of the lower portion of the first semiconductor layer;

a second semiconductor layer disposed over a surface of the first dielectric layer;

a second dielectric layer disposed over a surface of the second semiconductor layer;

a conductor layer disposed over a surface of the second semiconductor layer;

wherein:

the second semiconductor layer includes a source region, a channel region, and a drain region,

the conductor layer is configured to be a first gate electrode, and

the fin structure in the first semiconductor layer is configured to be a second gate electrode.

6. The device of claim 5 , wherein

the first semiconductor layer comprises a silicon germanium (SiGe) layer; and

the second semiconductor layer comprises one or more of indium gallium arsenide (InGaAs), indium arsenide (InAs), indium antimonide (InSb), or germanium (Ge).

7. The device of claim 5 , wherein the second semiconductor layer comprises a single crystalline material.

8. The device of claim 5 , wherein the fin structure has a rectangular cross-section.

9. The device of claim 5 , wherein the fin structure has a circular cross-section.

10. A semiconductor device, comprising:

a substrate;

a first semiconductor layer including a lower portion extending over the substrate and a fin structure protruding above the lower portion;

a first dielectric layer surrounding the fin structure;

a second semiconductor layer surrounding the first dielectric layer;

a gate dielectric layer surrounding the second semiconductor layer;

a metal layer surrounding the gate dielectric layer;

wherein:

the metal layer is configured to be a first gate electrode, and

the fin structure is configured to be a second gate electrode, wherein the second semiconductor layer comprises a source region, a channel region, and a drain region.

11. The semiconductor device of claim 10 , wherein the channel region has a same doping type as a doping type of the source region and the drain region.

12. The semiconductor device of claim 10 , wherein the substrate comprises silicon, and the first semiconductor layer comprises silicon germanium.

13. The semiconductor device of claim 10 , wherein the second semiconductor layer comprises one or more of indium gallium arsenide (InGaAs), indium arsenide (InAs), indium antimonide (InSb), or germanium (Ge).

14. The semiconductor device of claim 10 , wherein the second semiconductor layer comprises a single crystalline material.

15. The semiconductor device of claim 10 , wherein the fin structure has a circular cross-section.

16. The semiconductor device of claim 10 , wherein the fin structure has an elliptical cross-section.

17. The semiconductor device of claim 10 , wherein the fin structure has a square or rectangular cross-section.

18. The semiconductor device of claim 10 , wherein the second semiconductor layer comprises a single crystalline material.