Edge termination for super-junction MOSFETs
Edge termination for MOSFETs. In accordance with an embodiment of the present invention, a metal oxide semiconductor field effect transistor (MOSFET) includes a core region including a plurality of parallel core plates coupled to a source terminal of the MOSFET. The MOSFET also includes a termination region surrounding the core region comprising a plurality of separated floating termination segments configured to force breakdown into the core region and not in the termination region. Each termination segment has a length dimension less than a length dimension of the core plates.
1. A metal oxide semiconductor field effect transistor (MOSFET) comprising:
a core region comprising a plurality of parallel core plates coupled to a source terminal of said super-junction MOSFET; and
a termination region surrounding said core super-junction region comprising
a plurality of termination segments configured to force breakdown into said core super-junction region and away from said termination region,
wherein all said termination segments in said termination region are electrically floating,
wherein each of said termination segments has a length dimension less than a length dimension of said core plates.
2. The MOSFET of claim 1 comprising a trench gate.
3. The MOSFET of claim 1 wherein said termination segments have rounded corners of radius much less than their diagonal dimension.
4. The MOSFET of claim 1 wherein a charge balance of said termination region is less rich in the type of carriers of said termination segments.
5. The super-junction MOSFET of claim 1 wherein said termination segments are wider than said core plates.
6. The MOSFET of claim 5 wherein an increased charge of said termination segments due to an increased width of said termination segments in comparison to a width of said core plates is substantially equal to the magnitude of an opposite charge in material between said termination segments.
7. The MOSFET of claim 1 wherein said termination region achieves a breakdown voltage of 800 volts in a width dimension of 80 microns.
8. A metal oxide semiconductor field effect transistor (MOSFET) comprising:
a core region formed in a substrate of first conductivity type, below an active region of said MOSFET, said core region comprising:
a plurality of parallel core plates of a second conductivity type coupled to a source terminal of said MOSFET, each of said plates having a plate width;
said core plates alternating with regions of said first conductivity having a width of about said plate width;
a plurality of separated floating termination segments of said second conductivity type formed in said substrate, separated from one another by regions of said first conductivity type,
wherein each of said termination segments has a length dimension less than a length dimension of said core plates, and
wherein said floating termination segments are configured to have a higher breakdown voltage than said core region.
9. The MOSFET of claim 8 wherein said core plates are below the level of a gate of said MOSFET.
10. The MOSFET of claim 8 wherein a vertical depth of said core plates are substantially the same as a vertical depth of said termination segments.
11. The MOSFET of claim 8 wherein said termination segments are wider than said core plates.
12. The MOSFET of claim 11 wherein a charge of one said termination segments is about equal to the magnitude of a charge in a region separating said termination segment from an adjacent termination segment.
13. The MOSFET of claim 8 wherein a charge of first conductivity is greater than a charge of said second conductivity in said termination region.
14. A metal oxide semiconductor field effect transistor (MOSFET) comprising:
a substrate of first conductivity;
a plurality of gate trenches descending beneath a surface of said substrate,
wherein each gate trench comprises one or more gates of said MOSFET;
source and body regions of said MOSFET in a mesa between said gate trenches;
a drift region below said gate trenches and below said source and body regions, said drift region comprising:
a plurality of core plates of a second conductivity alternating with regions of said first conductivity, wherein said core plates are coupled to said source regions of said MOSFET;
a termination region surrounding said drift region at about the same depth as said drift region, said termination region comprising:
a plurality of separated floating termination segments of said second conductivity formed in said substrate, separated from one another by regions of said first conductivity,
wherein there are no gates of said MOSFET above said termination region, and
wherein each of said termination segments has a length dimension not greater than a length dimension of said core plates.
15. The MOSFET of claim 14 wherein said termination segments are wider than said core plates.
16. The MOSFET of claim 14 wherein a charge of one said termination segments is about equal to the magnitude of a charge in a region separating said termination segment from an adjacent termination segment.
17. The MOSFET of claim 14 wherein a charge of first conductivity is greater than a charge of said second conductivity in said termination region.
18. The MOSFET of claim 14 wherein said termination segments have rounded corners of radius much less than their diagonal dimension.
19. The MOSFET of claim 14 wherein termination segments at a corner of said termination region are reduced in extent to approximate a rounded corner of said termination region.
20. The MOSFET of claim 1 wherein all said core plates have substantially the same length and width dimensions.