Non-volatile dual in-line memory module (NVDIMM) multichip package
View Patent ↗A single multichip package is provided, comprising: a substrate having opposing upper and lower surfaces. A first die is mounted on the upper surface of the substrate and includes one or more non-volatile memory devices. A second die is mounted on the upper surface of the substrate, and includes at least one of: (a) a non-volatile memory controller that facilitates transfer of data to/from the one or more non-volatile memory devices, (b) a register clock driver for volatile memory devices, and/or (c) one or more multiplexer switches configured to switch between two or more of the volatile memory devices. A plurality of wire bonds connect the first and second dies. A plurality of solder balls are located on the lower surface of the substrate for mounting the single multichip package to a printed circuit board, the plurality of solder balls electrically coupled to the first die and the second die.
1. A single multichip package, comprising:
a substrate having opposing upper and lower surfaces;
a first die mounted on the upper surface of the substrate, the first die including one or more non-volatile memory devices;
a second die mounted on the upper surface of the substrate, the second die including at least one of: (a) a non-volatile memory controller that facilitates transfer of data to and from the one or more non-volatile memory devices, (b) a register clock driver for volatile memory devices, and/or (c) one or more multiplexer switches configured to switch between two or more of the volatile memory devices;
a plurality of wire bonds connecting the first die and the second die; and
a plurality of solder balls located on the lower surface of the substrate for mounting the single multichip package to a printed circuit board, the plurality of solder balls electrically coupled to the first die and the second die.
2. The package of claim 1 , further comprising an encapsulant enclosing the first die, the second die and the plurality of wire bonds to the upper surface of the substrate.
3. The package of claim 1 , wherein the one or more non-volatile memory devices are dual in-line memory modules (DIMM).
4. The package of claim 1 , wherein the non-volatile memory controller is configured to transfer data between the volatile memory devices and the one or more non-volatile memory devices.
5. The package of claim 1 , wherein upon detection of a powerloss condition, the non-volatile memory controller is configured to transfer data from the volatile memory devices to the one or more non-volatile memory devices.
6. The package of claim 5 , wherein upon detection of a power restored condition, the non-volatile memory controller is configured to transfer data from the one or more non-volatile memory devices to the volatile memory devices.
7. The package of claim 1 , wherein the non-volatile memory controller is coupled to the one or more multiplexer switches, and the one or more multiplexer switches are configured to be selectively switched between the volatile memory devices and the one or more non-volatile memory devices.
8. The package of claim 1 , wherein the second die is the non-volatile memory controller.
9. The package of claim 1 , wherein the second die implements both the non-volatile memory controller and the register clock driver.
10. The package of claim 1 , wherein the second die implements the non-volatile memory controller, the register clock driver, and the one or more multiplexer switches.
11. The package of claim 1 , wherein the second die implements the register clock driver and the one or more multiplexer switches.
12. The package of claim 1 , wherein the second die further includes a switch control (SC) configured to trigger change of data flow in the one or more multiplexer switches.
13. The package of claim 1 , wherein integration of the first die and second die reduces parasitic electrical loading on signals interconnecting the various components of the first die and the second die.
14. A non-volatile dual in-line memory module (NVDIMM) having integrated control functions, comprising:
at least one multichip package (MCP) comprising:
a substrate having opposing upper and lower surfaces;
a first die mounted on the upper surface of the substrate, the first die including one or more non-volatile memory devices;
a second die mounted on the upper surface of the substrate, the second die including at least one of: (a) a non-volatile memory controller that facilitates transfer of data to and from the one or more non-volatile memory devices, (b) a register clock driver for volatile memory devices, and/or (c) one or more multiplexer switches configured to switch between two or more of the volatile memory devices;
a plurality of wire bonds connecting the first die and the second die; and
a plurality of solder balls located on the lower surface of the substrate for mounting the single multichip package to a printed circuit board, the plurality of solder balls electrically coupled to the first die and the second die.