Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system

1. A method, comprising:

issuing, by a Direct Memory Access (DMA) engine, an update request to a dependency table if the DMA engine has finished executing a first descriptor; and

issuing, by the DMA engine, a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the selected subindex is in the dependency table.

2. The method of claim 1 , further comprising:

updating a subindex bit value in the dependency table in response to the update request.

3. The method of claim 1 , wherein each of a plurality of DMA engines uses a corresponding one of a plurality of subindex updaters that update subindex bit values in the dependency table in response to update requests from the DMA engines.

4. The method of claim 3 , further comprising:

selecting which of the plurality of subindex updaters is granted to write to an index in the dependency table.

5. The method of claim 1 , further comprising:

routing monitoring requests to a monitoring request buffer; and

selecting which monitoring request in the monitoring request buffer will be executed by a monitoring request router.

6. The method of claim 5 , wherein selecting a monitoring request in the monitoring request buffer comprises using an arbitrated algorithm if the monitoring request buffer is partially filled with monitoring requests.

7. The method of claim 5 , wherein selecting a monitoring request in the monitoring request buffer comprises using a round-robin algorithm if the monitoring request buffer is full of monitoring requests.

8. The method of claim 1 , wherein each of a plurality of DMA engines uses a corresponding one of a plurality of monitoring request routers that execute monitoring requests from the DMA engines.

9. The method of claim 1 , further comprising:

routing a target subindex in an index from the dependency table to a corresponding monitor register and subsequently out to a corresponding bit in a monitoring channel.

10. An apparatus, comprising:

a Direct Memory Access (DMA) engine configured to issue an update request to a dependency table if the DMA engine has finished executing a first descriptor, and configured to issue a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the selected subindex is in the dependency table.

11. The apparatus of claim 10 , further comprising:

an update selector configured to update a subindex bit value in the dependency table in response to the update request.

12. The apparatus of claim 10 , wherein each of a plurality of DMA engines uses a corresponding one of a plurality of subindex updaters that update subindex bit values in the dependency table in response to update requests from the DMA engines.

13. The apparatus of claim 12 , further comprising:

an update selector configured to select which of the plurality of subindex updaters is granted to write to an index in the dependency table.

14. The apparatus of claim 10 , further comprising:

a monitoring request router configured to route a monitoring request to a monitoring request buffer; and

a monitoring request selector configured to select which monitoring request in the monitoring request buffer will be executed by the monitoring request router.

15. The apparatus of claim 14 , wherein the monitoring request selector selects a monitoring request in the monitoring request buffer by using an arbitrated algorithm if the monitoring request buffer is partially filled with monitoring requests.

16. The apparatus of claim 14 , wherein the monitoring request selector selects a monitoring request in the monitoring request buffer by using a round-robin algorithm if the monitoring request buffer is full of monitoring requests.

17. The apparatus of claim 10 , wherein each of a plurality of DMA engines uses a corresponding one of a plurality of monitoring request routers that execute monitoring requests from the DMA engines.

18. The apparatus of claim 10 , further comprising:

a monitoring request router configured to route a target subindex in an index from the dependency table to a corresponding monitor register and subsequently out to a corresponding bit in a monitoring channel.

19. An article of manufacture, comprising:

a non-transient computer-readable medium having stored thereon instructions that, when executed, cause operations comprising:

issuing, by a Direct Memory Access (DMA) engine, an update request to a dependency table if the DMA engine has finished executing a first descriptor; and

issuing, by the DMA engine, a monitoring request if the DMA engine is executing a second descriptor that depends on a completion of a data transfer so that the DMA engine can monitor a status of a selected subindex related to the data transfer, wherein the selected subindex is in the dependency table.

20. The article of manufacture of claim 19 , wherein the operations include:

updating a subindex bit value in the dependency table in response to the update request.