IP Library Granted Patent US 10,231,295
Granted Patent B2
US 10,231,295 · App. 15/604,137 · Granted Mar 12, 2019

Multiple linear regulation

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Quick Facts
Patent No.
US 10,231,295
App. No.
15/604,137
Granted
Mar 12, 2019
Kind
B2
Abstract

A circuit comprises an amplifier and a plurality of channels, the plurality of channels including respective transistors. The respective transistors of the channels control respective magnitudes of respective currents of the channels according to an output of the amplifier. The respective transistors of the plurality of channels may be included in an auto-commutated circuit. A first Light Emitting Diode (LED) circuit may be coupled between a power source and a first channel of the plurality of channels. A second LED circuit may be coupled between the first channel and a second channel of the plurality of LED channels. The power source may provide rectified Alternating Current (AC).

Claims (45)

1. A circuit comprising:

an auto-commutated control circuit, the auto-commutated control circuit including a plurality of channels including a first channel and a second channel; and

an amplifier having an output, the output being coupled to each of the channels of the plurality of channels,

wherein the auto-commutated control circuit selects a channel to control a current flowing through the auto-commutated control circuit, and

wherein respective transistors of the channels control respective magnitudes of respective currents of the channels according to the output of the amplifier when the respective channel is selected to control the current flowing through the auto-commutated control circuit, and

wherein the first channel includes a first transistor to control a current of the first channel, the first transistor including:

a first gate terminal coupled to the output of the amplifier,

a first conduction terminal coupled to a power source through a first load, and

a second conduction terminal coupled to a first terminal of a blocking diode,

wherein the second channel includes a second transistor to control a current of the second channel, the second transistor including:

a second gate terminal coupled to the output of the amplifier,

a third conduction terminal coupled to a second terminal of the blocking diode and to the power source through a second load and the first load, and

a fourth conduction terminal coupled to a current sense node, and

wherein the first transistor is turned off in response to a voltage of the third conduction terminal back-biasing the blocking diode, and

wherein, when the first transistor is turned on, the current of the first channel flows through the first and second conduction terminals of the first transistor and the blocking diode.

2. The circuit of claim 1 , further comprising:

the first load including a first Light Emitting Diode (LED) circuit coupled between the power source and the first channel; and

the second load including a second LED circuit coupled between the first channel and the second channel.

3. The circuit of claim 2 , wherein the power source provides rectified Alternating Current (AC).

4. The circuit of claim 1 , further comprising:

a current sense resistor coupled between the current sense node and a ground,

wherein a negative input of the amplifier is coupled to the current sense node, and

wherein a positive input of the amplifier is coupled to a reference voltage.

5. A method of controlling respective currents of a plurality of channels of an auto-commutated control circuit, the method comprising:

generating an amplifier output using an amplifier;

providing the amplifier output to respective gate terminals of each of respective transistors of the plurality of channels;

selecting, by the auto-commutated control circuit, a selected channel from among the plurality of channels; and

controlling a magnitude of a current of the selected channel using the transistor of the selected channel and according to the amplifier output,

wherein the transistor of a first channel of the plurality of channels has a first conduction terminal coupled to a first terminal of a first load and a first terminal of a second load, and has a second conduction terminal coupled a first terminal of a blocking diode,

wherein the transistor of a second channel of the plurality of channels has a third conduction terminal coupled to a second terminal of the second load and to a second terminal of the blocking diode, and has a fourth conduction terminal coupled to a current sense node,

wherein the first transistor is turned off in response to a voltage of the third conduction terminal back-biasing the blocking diode, and

wherein, when the first transistor is turned on, the current of the first channel flows through the first and second conduction terminals of the first transistor and the blocking diode.

6. The method of claim 5 , further comprising:

when the selected channel is the first channel, controlling a magnitude of a current through the first load using a transistor of the first channel and the amplifier output; and

when the selected channel is the second channel, controlling a magnitude of a current through the first load and the second load using a transistor of the second channel and the amplifier output,

wherein the first load is coupled between a power source and the first channel, and

wherein the second load is coupled between the first channel and the second channel.

7. The method of claim 6 , further comprising:

providing, using the power source, a rectified Alternating Current (AC) to the first load.

8. The method of claim 6 ,

wherein a the first load includes a first Light Emitting Diode (LED) circuit, and

wherein the second load includes a second LED circuit.

9. The method of claim 6 , further comprising

generating a current sense voltage at the current sense node according to the current through the first load; and

generating the amplifier output according to a difference between the current sense voltage and a reference voltage.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 044481, FRAME 0594 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064074/0363 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0594 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2017
From: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 044361/0205 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: EUM, HYUN-CHUL; KIM, YOUNG-JONG
To: FAIRCHILD KOREA SEMICONDUCTOR, LTD.
Reel/Frame 042495/0472 →