Computing systems including storage devices controlled by hosts
Disclosed is a computing system which includes a storage device and a host. The storage device may include a nonvolatile memory, and the host may control the storage device based on a physical address of the nonvolatile memory and may send an asynchronous event request command to the storage device. The storage device may monitor the nonvolatile memory and may send an asynchronous event request corresponding to the asynchronous event request command to the host based on the monitoring result. The asynchronous event request may include requesting another command from the host based on the monitoring result. In some aspects, the host may send an erase command for erasing to erase a selected memory block of the nonvolatile memory to the storage device. In response, the storage device may send an erase pass response or an erase delay violation response to the host in response to the erase command.
1. A computing system comprising:
a storage device comprising a nonvolatile memory; and
a host comprising a flash translation layer to manage a physical address of the nonvolatile memory and configured to control the storage device based on the physical address of the nonvolatile memory and to send an asynchronous event request command to the storage device,
wherein the storage device is configured to monitor the nonvolatile memory responsive to the asynchronous event request command and is configured to send an asynchronous event request corresponding to the asynchronous event request command to the host based on a monitoring result,
wherein the asynchronous event request comprises a request for another command from the host based on the monitoring result,
wherein the host is configured to send to the storage device an information request command requesting information about a portion of the nonvolatile memory having a potential error in response to the host receiving the asynchronous event request, and
wherein the storage device is configured to respond to the information request command with a response indicating an address, a number of erroneous data bits, or an erase count of the potential error.
2. The computing system of claim 1 , wherein the host is configured to change a physical address of data stored in the portion of the nonvolatile memory having the potential error based on the information about the portion of the nonvolatile memory having the potential error and is configured to send a reclaim command to the storage device such that the data is stored at the changed physical address.
3. The computing system of claim 1 , wherein the host is configured to send another asynchronous event request command to the storage device after receiving the asynchronous event request.
4. The computing system of claim 1 , wherein the host is configured to obtain a logical address corresponding to the physical address of the nonvolatile memory via the flash translation layer, and wherein the host is configured to generate the asynchronous event request command based on the physical address of the nonvolatile memory.
5. A computing system comprising:
a host comprising: a processor and a host memory; and
a storage device comprising a nonvolatile memory connected to the host via a storage interface,
wherein the host memory stores instructions that control the processor to perform operations comprising:
transmitting an asynchronous event request command to the storage device;
receiving, from the storage device, an asynchronous event request responsive to the asynchronous event request command indicates a potential or actual occurrence of an error,
transmitting, to the storage device, a detailed information request command responsive to information included in the asynchronous event request,
receiving, from the storage device, a response to the detailed information request command indicating an address, a number of erroneous data bits, or an erase count of a potential or actual error,
mapping erroneous data from a first physical address of the nonvolatile memory to a second physical address of the nonvolatile memory responsive to receiving the response to the detailed information request command; and
sending a reclaim command to the storage device to move the erroneous data from the first physical address to the second physical address.
6. The computing system of claim 5 , wherein the information included in the asynchronous event request indicates an existence of an erroneous memory block and wherein the response to the detailed information request command indicates an address, a number of erroneous data bits, or an erase count of the erroneous memory block.
7. The computing system of claim 5 , wherein the information included in the asynchronous event request indicates an existence of an erroneous memory page and wherein the response to the detailed information request command indicates an address, a number of erroneous data bits, or an erase count of the erroneous memory page.
8. The computing system of claim 5 , wherein the host memory stores further instructions that control the processor to perform operations comprising:
transmitting another asynchronous event request command to the storage device responsive to receiving, from the storage device, the response to the detailed information request command.
9. The computing system of claim 5 , wherein the asynchronous event request indicates the potential occurrence of the error, and wherein the response to the detailed information request command indicates the address, the number of erroneous data bits, or the erase count of the potential error.