IP Library Granted Patent US 9,893,428
Granted Patent B2
US 9,893,428 · App. 15/606,756 · Granted Feb 13, 2018

Direct transition from a waveguide to a buried chip

Inventors: Danny Elad (Moshav Liman, IL); Noam Kaminski (Kiryat Tivon, IL); Ofer Markish (Nesher, IL)
Assignee: Semiconductor Components Industries, LLC
H01Q13/00H01P3/12H01P3/16H01P5/08H01P5/107H01Q1/50H01Q13/02H01Q13/0283H01Q15/141H01Q19/10H01Q19/30
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Quick Facts
Patent No.
US 9,893,428
App. No.
15/606,756
Granted
Feb 13, 2018
Kind
B2
Abstract

An assembly for confining electromagnetic radiation in a waveguide. The assembly comprises a waveguide, comprising walls surrounding a cavity and an aperture in the walls that opens to the cavity, and a substrate assembly disposed in the aperture. The substrate assembly comprises a substrate comprising an antenna, wherein the antenna is located within the cavity and is configured for transmission of radiation within the cavity. The substrate assembly comprises an integrated circuit (IC) electrically connected to the substrate, where the IC comprises semi-conductor components and a ground plane on one side of the IC. The ground plane is located between the IC semi-conductor components and the antenna. The ground plane is located across the aperture to reduce the area of the aperture and to reflect some of the radiation directed to the aperture back into the cavity.

Claims (30)

1. An assembly for electromagnetic transmission, comprising:

an electromagnetic waveguide cavity defined by waveguide walls, wherein said walls have an aperture that opens to said cavity; and

a substrate assembly disposed in said aperture and including:

(a) a substrate having a ground plane and an antenna, wherein said antenna is located within said cavity and configured for transmitting or receiving electromagnetic radiation via said cavity; and

(b) an integrated circuit (IC) electrically connected to said substrate, wherein said IC comprises a plurality of electronic components,

wherein said ground plane is located (i) between said plurality of electronic components and said antenna, and (ii) across said aperture to confine said electromagnetic radiation to said cavity by reducing the area of said aperture.

2. The assembly of claim 1 , wherein said ground plane is substantially coplanar with one of said waveguide walls.

3. The assembly of claim 1 , wherein said antenna comprises:

a first transceiving conductor electrically connected to said IC, wherein said first transceiving conductor comprises at least one recess configured to decrease resonance within said cavity from electromagnetic radiation emanating from said first transceiving conductor; and

a second transceiving conductor electrically isolated from said IC to increase the bandwidth of said electromagnetic radiation emanating from said first transceiving conductor.

4. The assembly of claim 3 , wherein said first transceiving conductor is a C-shape slotted conductor patch.

5. The assembly of claim 3 , wherein said first transceiving conductor is an E-shape slotted conductor patch.

6. The assembly of claim 1 , wherein said integrated circuit is electrically connected to said substrate with a controlled collapse chip connection.

7. The assembly of claim 1 , wherein said antenna comprises metallic layers embedded in said substrate.

8. The assembly of claim 1 , wherein said antenna is a surface mount component electrically connected to said substrate.

9. The assembly of claim 1 , wherein said substrate is electrically connected to a printed circuit board by a flexible printed circuit board.

10. The assembly of claim 1 , wherein said substrate is electrically connected to a printed circuit board by a connector.

11. The assembly of claim 1 , wherein said substrate is electrically connected to a printed circuit board by a direct solder connection and said IC is an active embedded component in said substrate.

12. The assembly of claim 1 , wherein said substrate comprises a plurality of vias arranged across some of said aperture to further confine said electromagnetic radiation to said cavity by further reducing the area of said aperture.

13. The assembly of claim 1 , wherein a ground plane of said IC is also located between said plurality of electronic components and said antenna.

14. A manufacturing method comprising:

preparing a substrate that includes a ground plane and an antenna;

attaching an integrated circuit to said substrate using a controlled collapse chip connection, wherein said IC comprises a plurality of electronic components, and said attaching positions said ground plane between said electronic components and said antenna, thereby producing a substrate assembly;

mounting said substrate assembly to an electromagnetic waveguide, such that an aperture in said waveguide receives said substrate with

(i) said antenna located within a cavity of said waveguide, and

(ii) said ground plane of said substrate located across said aperture to confine electromagnetic radiation to said cavity by reducing the area of said aperture.

15. The method of claim 14 , wherein said mounting includes making said ground plane coplanar with at least one wall of said waveguide.

16. The method of claim 15 , wherein said substrate further includes a plurality of vias, and wherein said mounting arranges the plurality of vias across some of said aperture to further confine said electromagnetic radiation to said cavity by further reducing the area of said aperture.

17. The method of claim 14 , wherein said antenna comprises a first transceiving conductor electrically connected to some of said plurality of electronic components using a via of said substrate; and a second transceiving conductor electrically isolated from said plurality of electronic components.

18. The method of claim 14 , wherein said attaching also positions a ground plane of said IC between said plurality of electronic components and said antenna.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 044481, FRAME 0594 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064074/0363 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: AY DEE KAY LLC DBA INDIE SEMICONDUCTOR
Reel/Frame 060744/0472 →
RELEASE OF SECURITY INTEREST Recorded Oct 1, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057674/0203 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0594 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INADVERTENTLY FILED ASSIGNMENT PREVIOUSLY RECORDED ON REEL 042520 FRAME 0198. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 5, 2017
From: LEVINGER, RUN; VOVNOBOY, JAKOB
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044134/0852 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2017
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042517/0935 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2017
From: LEVINGER, RUN; VOVNOBOY, JAKOB
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 042520/0198 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2017
From: ELAD, DANNY; KAMINSKI, NOAM; MARKISH, OFER
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 042517/0897 →
Continuity (2)
Continuation 14964689 · Dec 10, 2015
Related Publication 20170271775A1 · Sep 21, 2017