IP Library › Granted Patent US 10,121,876
Granted Patent B2
US 10,121,876 · App. 15/607,698 · Granted Nov 6, 2018

Method for high temperature annealing of a nitride semiconductor layer

Inventors: Shinya Takashima (Hachioji, JP); Katsunori Ueno (Matsumoto, JP); Masaharu Edo (Tokorozawa, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/66666H01L21/0217H01L21/0228H01L21/0254H01L21/02178H01L21/26546H01L29/2003H01L29/4236H01L29/7827
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Quick Facts
Patent No.
US 10,121,876
App. No.
15/607,698
Granted
Nov 6, 2018
Kind
B2
Abstract

In case of performing annealing at a temperature of 1300° C. or higher, it is not possible to sufficiently suppress escape of nitrogen from a GaN layer even if a cap layer is provided thereon. Thereby, the front surface of the GaN layer is roughened. A semiconductor device manufacturing method of manufacturing a semiconductor device having a nitride semiconductor layer is provided. The semiconductor device manufacturing method includes: implanting, into a predetermined region of the nitride semiconductor layer, n-type or p-type impurities relative to the nitride semiconductor layer; forming, by atomic layer deposition, a first protective film containing a nitride on and in direct contact with at least the predetermined region; and annealing the nitride semiconductor layer and the first protective film at a temperature of 1300° C. or higher.

Claims (32)

1. A semiconductor device manufacturing method of manufacturing a semiconductor device having a nitride semiconductor layer, the semiconductor device manufacturing method comprising:

implanting, into a predetermined region of the nitride semiconductor layer, n-type or p-type impurities relative to the nitride semiconductor layer;

forming, by atomic layer deposition, a first protective film containing a nitride on and in direct contact with at least the predetermined region; and

annealing the nitride semiconductor layer and the first protective film at a temperature of 1300° C. or higher, wherein

the implanting has implanting n-type impurities relative to the nitride semiconductor layer into another predetermined region of the nitride semiconductor layer before the implanting the p-type impurities into the predetermined region,

the semiconductor device manufacturing method further comprises, before the implanting the n-type impurities, forming a third protective film that is on and in direct contact with the other predetermined region and contains one or more types among silicon and oxygen, and

the first protective film is formed by the atomic layer deposition after removing the third protective film.

2. The semiconductor device manufacturing method according to claim 1 , wherein the forming the first protective film by the atomic layer deposition has forming the first protective film having an aluminium nitride or a silicon nitride by supplying, onto the nitride semiconductor layer, an aluminium atom-containing gas or a silicon atom-containing gas and a nitrogen atom-containing gas alternately.

3. The semiconductor device manufacturing method according to claim 1 , wherein in the forming the first protective film by the atomic layer deposition, a temperature of the nitride semiconductor layer is 600° C. or lower.

4. The semiconductor device manufacturing method according to claim 1 , wherein in the forming the first protective film by the atomic layer deposition, a temperature of the nitride semiconductor layer is 300° C. or higher.

5. The semiconductor device manufacturing method according to claim 1 , wherein the first protective film has a thickness of 2 nm or larger and 100 nm or smaller.

6. The semiconductor device manufacturing method according to claim 1 , wherein the forming the first protective film by the atomic layer deposition has:

(a) supplying trimethylaluminium onto the nitride semiconductor layer;

(b) evacuating a reaction chamber in which the nitride semiconductor layer is placed;

(c) irradiating the nitride semiconductor layer with plasma of a nitrogen-containing gas; and

(d) evacuating the reaction chamber, and

one cycle including (a) to (d) is repeated multiple times to form the first protective film.

7. The semiconductor device manufacturing method according to claim 1 , wherein

the nitride semiconductor layer has a trench to which a gate insulating film and a gate electrode are provided, and

the first protective film is provided coating a bottom portion and a side portion of the trench.

8. The semiconductor device manufacturing method according to claim 1 , wherein the implanting has implanting the p-type impurities into the predetermined region after the forming the first protective film by the atomic layer deposition.

9. A semiconductor device manufacturing method of manufacturing a semiconductor device having a nitride semiconductor layer, the semiconductor device manufacturing method comprising:

implanting, into a predetermined region of the nitride semiconductor layer, n-type or p-type impurities relative to the nitride semiconductor layer;

forming, by a first type of method, a first protective film containing a nitride on and in direct contact with at least the predetermined region;

forming a second protective film on and in direct contact with the first protective film by a second type of method different from the first type of method; and annealing the nitride semiconductor layer, the first protective film and the second protective film at a temperature of 1300° C. or higher, wherein

the implanting has implanting n-type impurities relative to the nitride semiconductor layer into another predetermined region of the nitride semiconductor layer before the implanting the p-type impurities into the predetermined region,

the semiconductor device manufacturing method further comprises, before the implanting the n-type impurities, forming a third protective film that is on and in direct contact with the other predetermined region and contains one or more types among silicon and oxygen, and

the first protective film is formed by the atomic layer deposition after removing the third protective film.

10. The semiconductor device manufacturing method according to claim 9 , wherein the first type of method is atomic layer deposition.

11. The semiconductor device manufacturing method according to claim 10 , wherein the second type of method is sputtering.

12. The semiconductor device manufacturing method according to claim 11 , wherein a material of the first protective film is the same as a material of the second protective film.

13. The semiconductor device manufacturing method according to claim 9 , wherein a material of the first protective film is the same as a material of the second protective film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2017
From: TAKASHIMA, SHINYA; UENO, KATSUNORI; EDO, MASAHARU
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 042534/0841 →
Priority Claims (1)
JP 2016-138837 · Jul 13, 2016 · national
Continuity (1)
Related Publication 20180019322A1 · Jan 18, 2018