IP Library › Granted Patent US 10,644,134
Granted Patent B2
US 10,644,134 · App. 15/609,886 · Granted May 5, 2020

Gate formation with varying work function layers

Inventors: Jin-Dah Chen (Hsinchu, TW); Stan Chen (Taipei, TW); Han-Wei Wu (Tainan, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L29/66795H01L21/823821H01L21/823842H01L27/0924H01L29/0649H01L29/42364H01L29/42372H01L29/4958H01L29/785
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Quick Facts
Patent No.
US 10,644,134
App. No.
15/609,886
Granted
May 5, 2020
Kind
B2
Abstract

A structure and a method of forming are provided. A first work function layer is formed over a first fin and terminates closer to the first fin than an adjacent second fin. A second work function layer is formed over the first work function layer and terminates closer to the second fin than the adjacent second fin. A third work function layer is formed over the first work function layer and the second fin. A conductive layer is formed over the third work function layer.

Claims (51)

1. A method comprising:

forming a first dielectric layer over a first fin and a second fin;

forming a recess in the first dielectric layer, the first fin and the second fin protruding above a bottom of the recess;

forming a first work function layer over the first fin and the second fin;

forming a first patterned mask over the first work function layer, the first patterned mask terminating closer to the first fin than the second fin such that the first work function layer over the second fin is exposed, wherein forming the first patterned mask comprises:

forming a first masking layer over the first work function layer, the first masking layer filling the recess;

forming a first photoresist layer over the first masking layer;

patterning the first photoresist layer to form a first patterned photoresist layer; and

patterning the first masking layer using the first patterned photoresist layer as a mask;

removing the first work function layer from over the second fin and an area between the first fin and the second fin, the first work function layer terminating at a position closer to the first fin than the second fin;

removing the first patterned mask;

forming a second work function layer over the first work function layer and the second fin;

forming a second patterned mask over the second work function layer, the second patterned mask terminating closer to the second fin than the first fin such that the second work function layer over the second fin is exposed;

removing the second work function layer from over the second fin and an area between the first fin and the second fin, the second work function layer terminating at a position closer to the second fin than the first fin;

removing the second patterned mask;

forming a third work function layer over the second work function layer and the second fin; and

forming a metal layer over the third work function layer.

2. The method of claim 1 , further comprising forming a gate dielectric over the first fin and the second fin prior to forming the first work function layer.

3. The method of claim 1 , wherein the first work function layer extends along sidewalls of the recess.

4. The method of claim 3 , wherein the second work function layer extends along sidewalls of the recess.

5. The method of claim 1 , wherein forming the second patterned mask comprises:

forming a second masking layer over the second work function layer, the second masking layer filling the recess;

forming a second photoresist layer over the second masking layer;

patterning the second photoresist layer to form a second patterned photoresist layer; and

patterning the second masking layer using the second patterned photoresist layer as a mask.

6. The method of claim 1 , wherein a distance from the first fin to an edge of the first work function layer is 10 nm to 40 nm.

7. The method of claim 6 , wherein a distance from the first fin to an edge of the second work function layer is 20 nm to 90 nm.

8. The method of claim 1 , wherein the first fin and the second fin are free of an intervening fin interposed between the first fin and the second fin.

9. A method comprising:

forming a dielectric layer over a first fin and a second fin; and

forming a recess in the dielectric layer, the first fin and the second fin protruding through a bottom of the recess;

forming a first work function layer over the first fin, the first work function layer terminating closer to the first fin than the second fin;

forming a second work function layer over the first work function layer and the first fin, the second work function layer terminating closer to the second fin than the first fin, wherein the first fin and the second fin are adjacent fins with no intervening fins interposed between the first fin and the second fin, wherein the first work function layer and the second work function layer are formed along sidewalls of the recess;

forming a third work function layer over the second work function layer, the third work function layer extending over the second fin; and

forming a metal layer over the third work function layer.

10. The method of claim 9 , wherein the metal layer is a gate electrode.

11. The method of claim 9 , wherein a width of the recess is from 100 nm to 2000 nm.

12. The method of claim 9 , wherein a thickness of the first work function layer is 5 Å to 30 Å.

13. The method of claim 12 , wherein a thickness of the second work function layer is 5 Å to 50 Å.

14. The method of claim 9 , wherein the second work function layer completely separates the third work function layer from the first work function layer.

15. The method of claim 9 , wherein a distance from the first fin to an edge of the second work function layer is 20 nm to 90 nm.

16. A method comprising:

forming a first conductive layer over a first fin, the first conductive layer terminating closer to the first fin than a second fin, wherein the first fin and the second fin extend above a shallow trench isolation, wherein the shallow trench isolation extends continuously between the first fin and the second fin along a shortest line between the first fin and the second fin;

forming a second conductive layer over the first conductive layer, the second conductive layer extending over the first fin and terminating closer to the second fin than the first fin;

forming a third conductive layer over the second conductive layer, the third conductive layer extending over the first fin and the second fin, the first conductive layer being interposed between the second conductive layer and the first fin; and

forming a metal layer over the first fin and the second fin.

17. The method of claim 16 , further comprising:

prior to forming the first conductive layer, forming a dielectric layer, wherein the first fin and the second fin are exposed in a recess in the dielectric layer, wherein the first conductive layer extends along a sidewall of the recess.

18. The method of claim 17 , further comprising planarizing the metal layer, wherein an upper surface of the dielectric layer is level with an upper surface of the metal layer after planarizing.

19. The method of claim 16 , further comprising forming a gate dielectric prior to forming the first conductive layer, wherein the gate dielectric extends over the first fin and the second fin.

20. The method of claim 16 , wherein a distance from a midpoint between the first fin and the second fin is between about 20% and about 40% of a distance between the first fin and the second fin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2017
From: CHEN, JIN-DAH; CHEN, STAN; WU, HAN-WEI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 042854/0174 →
Continuity (1)
Related Publication 20180350955A1 · Dec 6, 2018
Cited By (1)
US 12,713,689