IP Library Granted Patent US 10,165,356
Granted Patent B1
US 10,165,356 · App. 15/613,437 · Granted Dec 25, 2018

Methods and apparatus for controlling a bias voltage

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Quick Facts
Patent No.
US 10,165,356
App. No.
15/613,437
Granted
Dec 25, 2018
Kind
B1
Abstract

Various embodiments of the present technology may comprise methods and apparatus for controlling a bias voltage. Methods and apparatus for controlling a bias voltage to an electrical device according to various aspects of the present invention may operate in conjunction with a charge pump and a voltage regulator. A pulse generator may be employed to vary the output voltage of the voltage regulator, which in turn, varies the output voltage (bias voltage) generated by the charge pump. The pulse generator may be activated at the start-up of the electrical device.

Claims (54)

1. An integrated circuit capable of generating a bias voltage, comprising:

a pulse generator circuit configured to generate a control signal after start-up;

a voltage regulator circuit coupled to the pulse generation circuit and configured to generate a regulator voltage in response to the control signal;

a clock driver circuit coupled to the voltage regulator circuit and configured to generate a clock driver output signal in response to the regulator voltage; and

a charge pump system coupled to the clock driver circuit and configured to generate the bias voltage in response to the clock driver output signal, wherein the bias voltage reaches a target value within a first period after start-up.

2. The integrated circuit according to claim 1 , wherein:

the clock driver circuit is further configured to receive a clock signal; and

the clock driver circuit generates the clock driver output signal in response to the clock signal.

3. The integrated circuit according to claim 1 , wherein the voltage regulator circuit comprises:

a primary circuit configured to generate a reference voltage; and

a secondary circuit coupled to the primary circuit and configured to generate the regulator voltage according to the reference voltage;

wherein the regulator voltage is proportional to the reference voltage.

4. The integrated circuit according to claim 3 , wherein at least one of the primary circuit and the secondary circuit is responsive to the control signal.

5. The integrated circuit according to claim 3 , wherein:

the voltage regulator circuit further comprises a switching circuit coupled to at least one of the primary circuit and the secondary circuit; and

the switching circuit comprises a switch responsive to the control signal.

6. The integrated circuit according to claim 1 , wherein the regulator voltage reaches a regulator maximum value during the first period and shifts to a regulator minimum value after the first period.

7. The integrated circuit according to claim 1 , wherein the first period is within the range of 0 to 50 milliseconds immediately after start-up.

8. The integrated circuit according to claim 1 , wherein the charge pump system comprises:

a charge pump circuit configured to generate a charge pump output voltage and comprising:

a plurality of charge pump units coupled to the clock driver output signal; and

a integrator circuit directly coupled to one of the charge pump units;

a low-pass filter coupled to an output terminal of the charge pump circuit; and

a diode coupled in parallel with the low-pass filter.

9. The integrated circuit according to claim 8 , wherein:

the charge pump output voltage reaches a charge pump maximum value during the first period and shifts to a charge pump minimum value after the first period; and

the difference between the regulator maximum value and the regulator minimum value is equal to a threshold voltage of the diode divided by the plurality of charge pump units.

10. A method for controlling a bias voltage, comprising:

generating a voltage pulse after start-up;

generating a regulator voltage in response to the voltage pulse;

generating a clock driver output signal in response to the regulator voltage; and

generating the bias voltage according to the clock driver output signal;

wherein the bias voltage reaches a target value during a first period after start-up.

11. The method according to claim 10 , wherein the first period is within the range of 0 to 50 milliseconds immediately after start-up.

12. The method according to claim 10 , wherein the regulator voltage reaches a regulator maximum value during the first period and shifts to a regulator minimum value after the first period.

13. The method according to claim 10 , further comprising generating a charge pump output voltage, wherein the charge pump output voltage reaches a charge pump maximum value during the first period and shifts to a charge pump minimum value after the first period.

14. The method according to claim 10 , wherein the bias voltage maintains the target value after the first period.

15. The method according to claim 10 , wherein generating the regulator voltage comprises operating a switching circuit according to the voltage pulse.

16. The method according to claim 10 , further comprising generating a reference voltage, wherein the regulator voltage is proportional to the reference voltage.

17. An audio system, comprising:

a micro electro-mechanical device;

an integrated circuit coupled to the micro electro-mechanical device, comprising:

a pulse generator circuit configured to generate a control signal after start-up;

a voltage regulator circuit, coupled to the pulse generation circuit, comprising:

a primary circuit configured to generate a reference voltage; and

a secondary circuit coupled to the primary circuit and configured to generate a regulator voltage in response to at least one of the reference voltage and the control signal;

a clock driver circuit coupled to the voltage regulator circuit and configured to generate a clock driver output signal in response to the regulator voltage;

a charge pump system coupled to the clock driver circuit and configured to generate a bias voltage in response to the clock driver output signal;

wherein the bias voltage reaches a target value within a first period after start-up and maintains the target value after the first period.

18. The audio system according to claim 17 , wherein the first period is within the range of 0 to 50 milliseconds immediately after start-up.

19. The audio system according to claim 17 , wherein the regulator voltage reaches a regulator maximum value during the first period and shifts to a regulator minimum value after the first period.

20. The audio system according to claim 17 , wherein:

the voltage regulator circuit further comprises a switching circuit coupled to at least one of the primary circuit and the secondary circuit; and

the switching circuit comprises a switch responsive to the control signal.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 044481, FRAME 0594 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: FAIRCHILD SEMICONDUCTOR CORPORATION; SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 064074/0363 →
PATENT SECURITY AGREEMENT Recorded Nov 17, 2017
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 044481/0594 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2017
From: ONISHI, AKINOBU
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 042593/0361 →