Wideband polar receiver architecture and signal processing methods

1. A method comprising:

receiving a phase-modulated input signal at a polar receiver including an injection-locked oscillator (ILO);

determining a frequency channel and selecting one of a plurality of band-specific amplifiers;

using a controller for the selected band-specific amplifier to switch a capacitor bank for setting a center frequency and a 3 dB bandwidth of the selected band-specific amplifier corresponding to the frequency channel;

using the controller to tune a free-running frequency of the ILO to be an Nth harmonic of a frequency of the frequency channel such that the frequency of the input signal divided by N is within a locking range of the ILO;

operating the injection-locked oscillator to provide an oscillator output signal, wherein a frequency of the oscillator output signal multiplied by N is near the center frequency of the determined frequency channel; and

multiplying the frequency of the oscillator output signal by a factor of N to generate a frequency-multiplied oscillator signal.

2. The method of claim 1 , further comprising calibrating a plurality of band-specific amplifiers, comprising:

determining, by a coarse tuning process, a set of most significant input bits to the capacitor bank; and

determining, by a fine tuning process, a set of least significant input bits to the capacitor bank,

wherein switching the capacitor bank according to a combination of the sets of most significant and least significant input bits configures one or more filters corresponding to a center frequency and a 3 dB bandwidth.

3. The method of claim 2 , wherein the coarse tuning process comprises:

iteratively increasing a quality factor Q value of the filter for the selected amplifier until the selected amplifier oscillates;

determining a frequency corresponding to the Q value causing the selected amplifier to oscillate; and

determining the most significant input bits to the capacitor bank based on the frequency corresponding to amplifier oscillation.

4. The method of claim 3 , wherein increasing the quality factor Q comprises altering a bias point of a set of cross-coupled transistors of a tank circuit.

5. The method of claim 2 , wherein the fine tuning process comprises iteratively adjusting the least significant input bits to the capacitor bank until the filter for the selected amplifier matches the center frequency and the 3 dB bandwidth for the frequency channel.

6. The method of claim 5 , wherein iteratively adjusting the least significant input bits to the capacitor bank comprises:

adjusting the least significant input bits to the capacitor bank;

generating one or more tone signals and applying those tone signals to the filter;

measuring an amplitude of each of the one or more filtered tone signals to determine a frequency of peak output of the filter and a 3 dB bandwidth of the filter; and

repeating the adjustment of the least significant input bits to the capacitor bank until the peak output of the filter matches the center frequency and the 3 dB bandwidth of the frequency channel.

7. The method of claim 1 , further comprising:

mixing the frequency-multiplied oscillator signal with the input signal to generate a mixed signal;

filtering the mixed signal;

sampling the filtered mixed signal; and

measuring a phase of the oscillator output.

8. The method of claim 1 , wherein the injection-locked oscillator is a ring oscillator including a plurality of sequential buffers.

9. The method of claim 8 , wherein multiplying the oscillator output signal includes combining a first buffer output of a first one of the buffers and a second buffer output of a second one of the buffers with an XOR operation.

10. The method of claim 1 , further comprising selecting a value of N based on the frequency of the input signal.

11. The method of claim 1 , wherein N is an integer greater than one.

12. A polar receiver for measuring the phase of a phase-modulated RF input signal, the receiver comprising:

a plurality of band-specific amplifiers, each amplifier configured to amplify RF signals in a respective predetermined frequency band;

a first tuning circuit configured to tune one of the plurality of band-specific amplifiers for a center frequency of a frequency channel within a predetermined frequency band;

an injection-locked oscillator including at least a first set of injection points and a second set of injection points, each set of injection points corresponding to a different harmonic of the injection-locked oscillator, the injection-locked oscillator further having an oscillator output;

a second tuning circuit configured to tune the injection-locked oscillator based on the center frequency of the frequency channel within the predetermined frequency band;

injection selection circuitry operative to selectively provide the input signal from a selected amplifier of the plurality of band-specific amplifiers to a selected one of the sets of injection points; and

phase detection circuitry connected to the oscillator output.

13. The receiver of claim 12 , wherein the phase detection circuity comprises:

a frequency divider having an input connected to the oscillator output, the frequency divider further having a frequency-divided output; and

a time-to-digital converter connected to the frequency-divided output.

14. The receiver of claim 12 , wherein the injection-locked oscillator is a ring oscillator.

15. The receiver of claim 14 , wherein the ring oscillator includes four buffers, and wherein:

a first set of injection points consists of respective injection points at a first, second, third and fourth one of the buffers; and

a second set of injection points consists of respective injection points at a second and a fourth one of the buffers.

16. The receiver of claim 12 , wherein the injection-locked oscillator is a ring oscillator comprising a plurality of sequential buffers, each buffer having a corresponding current source, and wherein each injection point is operative to modulate a respective one of the current sources.

17. The receiver of claim 16 , wherein each of the buffers introduces a buffer phase shift, and wherein a set of injection points associated with a second harmonic includes at least two differential injection points separated by a total buffer phase shift of substantially 90°.

18. The receiver of claim 16 , wherein each of the buffers introduces a buffer phase shift, and wherein a set of injection points associated with a fourth harmonic includes at least two differential injection points separated by a total buffer phase shift of substantially 45°.

19. The receiver of claim 12 , further comprising controller logic operative to perform functions comprising:

in response to a selection of an input signal frequency, selecting an Nth harmonic of the injection-locked oscillator such that the input signal frequency divided by N is within a locking range of the injection-locked oscillator; and

controlling the injection selection circuitry to provide the input signal to a set of injection points corresponding to the Nth harmonic.