IP Library › Granted Patent US 10,303,368
Granted Patent B2
US 10,303,368 · App. 15/622,855 · Granted May 28, 2019

Storage device that determines data attributes based on continuity of address ranges

Inventor: Kazuhito Okita (Ota Tokyo, JP)
Assignee: Toshiba Memory Corporation
G06F3/061G06F3/0659G06F3/0679G06F3/0688
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Quick Facts
Patent No.
US 10,303,368
App. No.
15/622,855
Granted
May 28, 2019
Kind
B2
Abstract

A storage device includes a nonvolatile memory including a plurality of blocks, and a controller. The controller is configured to retain a logical address range designated by each of a plurality of write commands that were received, and upon each gap of two adjacent logical address ranges of two or more of the write commands being smaller than a first threshold and an entire length of the logical address ranges of said two or more write commands being larger than a second threshold, write data corresponding to one of said two or more write commands in one of the blocks of the nonvolatile memory, as a part of a single data group comprising data corresponding to each of said two or more write commands, such that data that do not form the single data group are not written in said one of the blocks of the nonvolatile memory.

Claims (60)

1. A storage device comprising:

a nonvolatile memory including a plurality of blocks; and

a controller configured to:

retain a logical address range designated by each of a plurality of write commands that were received, and

upon each gap of two adjacent logical address ranges of two or more of the write commands being smaller than a first threshold and an entire length of the logical address ranges of said two or more write commands being larger than a second threshold, write data corresponding to one of said two or more write commands in one of the blocks of the nonvolatile memory, as a part of a single data group comprising data corresponding to each of said two or more write commands, such that data that do not form the single data group are not written in said one of the blocks of the nonvolatile memory.

2. The storage device according to claim 1 , wherein

the controller is further configured to manage a command management table having a plurality of entries each of which includes a total length of one or more logical address ranges designated by one or more of the plurality of write commands and a flag, wherein

when each gap of two adjacent logical address ranges is smaller than the first threshold, corresponding write commands are managed in a single entry of the command management table, and

when an entire length of the logical address ranges in the single entry is larger than the second threshold, the flag is activated in the entry.

3. The storage device according to claim 2 , wherein

the controller carries out a write operation in accordance with the plurality of write commands, referring to the command management table.

4. The storage device according to claim 1 , wherein

the controller is further configured to generate a data packet based on the data corresponding to said one of said two or more write commands, the data packet including an identifier of the single data group, and write the generated data packet in said one of the blocks of the nonvolatile memory.

5. The storage device according to claim 1 , wherein

the controller is further configured to manage a block management table having a plurality of entries each of which includes an identifier of a block and an identifier of a data group stored therein.

6. The storage device according to claim 1 , further comprising:

a buffer, wherein

the controller is further configured to:

retain a logical address range designated by each of a plurality of read commands that were received, and

upon each gap of two adjacent logical address ranges of two or more of the read commands being smaller than a third threshold and an entire length of the logical address ranges of said two or more read commands being larger than a fourth threshold, read data from a logical address range designated by one of said two or more read commands to the buffer by executing said one of the read commands, and then read data from one of the logical address ranges subsequent to the read logical address range to the buffer before executing a read command corresponding thereto.

7. The storage device according to claim 6 , wherein

the controller is further configured to transmit the data stored in the buffer to an external device by executing said one of said two or more read commands concurrently with reading the data from said one of the logical address ranges subsequent to the read logical address range.

8. The storage device according to claim 6 , wherein

the controller is further configured to manage a second command management table having a plurality of entries each of which includes a total length of one or more logical address ranges designated by the plurality of read commands and a flag, wherein

when each gap of two adjacent logical address ranges of the plurality of read commands is smaller than the third threshold, corresponding read commands are managed in a single entry of the second command management table, and

when an entire length of the logical address ranges in the single entry of the second command management table is larger than the fourth threshold, the flag is activated in the entry of the second command management table.

9. The storage device according to claim 8 , wherein

the controller carries out a read operation in accordance with the plurality of read commands, referring to the second command management table.

10. A storage device comprising:

a nonvolatile memory;

a buffer; and

a controller configured to:

retain a logical address range designated by each of a plurality of read commands that were received, and

upon each gap of two adjacent logical address ranges of two or more of the read commands being smaller than a first threshold and an entire length of the logical address ranges of said two or more read commands being larger than a second threshold, read data from a logical address range designated by one of said two or more read commands to the buffer by executing said one of the read commands, and then read data from one of the logical address ranges subsequent to the read logical address range to the buffer before executing a read command corresponding thereto.

11. The storage device according to claim 10 , wherein

the controller is further configured to transmit the data stored in the buffer to an external device by executing said one of said two or more read commands concurrently with reading the data from said one of the logical address ranges subsequent to the read logical address range.

12. The storage device according to claim 10 , wherein

the controller is further configured to manage a command management table having a plurality of entries each of which includes a total length of one or more logical address ranges designated by the plurality of read commands and a flag, wherein

when each gap of two adjacent logical address ranges of the plurality of read commands is smaller than the first threshold, corresponding read commands are managed in a single entry of the command management table, and

when an entire length of the logical address ranges in the single entry of the command management table is larger than the second threshold, the flag is activated in the entry of the command management table.

13. The storage device according to claim 12 , wherein

the controller carries out a read operation in accordance with the plurality of read commands, referring to the command management table.

14. A method of operating a storage device having a nonvolatile memory including a plurality of blocks, comprising:

retaining a logical address range designated by each of a plurality of write commands that were received; and

upon each gap of two adjacent logical address ranges of two or more of the write commands being smaller than a first threshold and an entire length of the logical address ranges of said two or more write commands being larger than a second threshold, writing data corresponding to one of said two or more write commands in one of the blocks of the nonvolatile memory, as a part of a single data group comprising data corresponding to each of said two or more write commands, such that data that do not form the single data group are not written in said one of the blocks of the nonvolatile memory.

15. The method according to claim 14 , further comprising:

managing a command management table having a plurality of entries each of which includes a total length of one or more logical address ranges designated by one or more of the plurality of write commands and a flag, wherein

when each gap of two adjacent logical address ranges is smaller than the first threshold, corresponding write commands are managed in a single entry of the command management table, and

when an entire length of the logical address ranges in the single entry is larger than the second threshold, the flag is activated in the entry.

16. The method according to claim 14 , further comprising:

maintaining a block management table having a plurality of entries each of which includes an identifier of a block and an identifier of a data group stored therein.

17. The method according to claim 14 , further comprising:

retaining a logical address range designated by each of a plurality of read commands that were received; and

upon each gap of two adjacent logical address ranges of two or more of the read commands being smaller than a third threshold and an entire length of the logical address ranges of said two or more read commands being larger than a fourth threshold, reading data from a logical address range designated by one of said two or more read commands to the buffer by executing said one of the read commands, and then read data from one of the logical address ranges subsequent to the read logical address range to the buffer before executing a read command corresponding thereto.

18. The method according to claim 17 , further comprising:

transmitting the data stored in the buffer to an external device by executing said one of said two or more read commands concurrently with reading the data from said one of the logical address ranges subsequent to the read logical address range.

19. The method according to claim 17 , further comprising:

managing a second command management table having a plurality of entries each of which includes a total length of one or more logical address ranges designated by the plurality of read commands and a flag, wherein

when each gap of two adjacent logical address ranges of the plurality of read commands is smaller than the third threshold, corresponding read commands are managed in a single entry of the second command management table, and

when an entire length of the logical address ranges in the single entry of the second command management table is larger than the fourth threshold, the flag is activated in the entry of the second command management table.

Assignments (4)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2017
From: OKITA, KAZUHITO
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043707/0284 →
Priority Claims (1)
JP 2016-118304 · Jun 14, 2016 · national
Continuity (1)
Related Publication 20180004416A1 · Jan 4, 2018