Configuration bit sequencing control of nonvolatile domain and array wakeup and backup
A processing device includes a plurality of non-volatile logic element array domains having two or more non-volatile logic element arrays to store 2006 a machine state of the processing device stored in a plurality of volatile store elements. Configuration bits are read to direct which non-volatile logic element array domains are enabled first and to direct an order in which the first enabled non-volatile logic element array domains are restored or backed up in response to entering a wakeup or backup mode. Configuration bits can be read to direct an order of and a parallelism of how individual non-volatile logic element arrays in a first enabled non-volatile logic element array domain are restored or backed up. The order of restoration or backing up can be controlled by instructions from non-volatile arrays of the first enabled of the plurality of non-volatile logic element array domains.
1. A computing device comprising:
a plurality of non-volatile logic element arrays comprising a first non-volatile logic element array, the first non-volatile logic element array configured to store an order to restore the plurality of non-volatile logic element arrays;
a volatile storage element configured to store data associated with a machine state of the computing device; and
a controller coupled to the first non-volatile logic element array and the volatile storage element, the controller configured to:
determine whether the first non-volatile logic element array is enabled in response to the computing device entering a wakeup or backup mode; and
in response to determining that the first non-volatile logic element array is enabled in response to the computing device entering a wakeup or backup mode, store data associated with the machine state from the volatile storage element.
2. The computing device of claim 1 wherein the controller is configured to read configuration bits that direct an order in which the machine state is restored from or backed up to the first non-volatile logic element array in response to the computing device entering a wakeup or backup mode.
3. The computing device of claim 1 wherein the controller is configured to associate a function with the first non-volatile logic element array.
4. The computing device of claim 1 wherein the function comprises of a plurality of peripheral functions for the computing device.
5. A method comprising:
storing data associated with a machine state of a computing device on a volatile storage element;
storing an order to restore a plurality of non-volatile logic element arrays on a first non-volatile logic element array in the plurality of non-volatile logic element arrays;
determine whether the first non-volatile logic element array is enabled in response to the computing device entering a wakeup or backup mode; and
in response to determining that the first non-volatile logic element array is enabled in response to the computing device entering a wakeup or backup mode, storing data associated with the machine state from the volatile storage element machine state to the first non-volatile logic element array.
6. The method of claim 5 further comprising reading configuration bits to direct an order in which machine state is restored from or backed up to the first enabled of the plurality of non-volatile logic element array domains in response to the computing device apparatus's entering a wakeup or backup mode.
7. The method of claim 5 further comprising associating a function with the first non-volatile logic element array.
8. The method of claim 7 wherein the function comprises designating any one of a plurality of peripheral functions for the computing device.