System and method for per-agent control and quality of service of shared resources in chip multiprocessor platforms

1. A system comprising:

a plurality of core and non-core requestors within a chip multiprocessor, the plurality of core and non-core requestors sharing shared resources provided by one or more resource providers, each of the plurality of core and non-core requestors associated with a respective resource-monitoring tag and a resource-control tag;

a mapping table to store the resource-monitoring and resource-control tags associated with each of the non-core requestors;

tagging circuitry to:

receive a resource request sent from a first non-core requestor to a first resource provider, the resource request comprising a first address in an address space of the first non-core requestor;

translate the first address to a second address in an address space of the first resource provider;

look up the resource-monitoring and resource-control tags of the first non-core requestor from the mapping table;

modify the resource request to replace the first address with the second address and to include the resource-monitoring and resource-control tags of the first non-core requestor to generate a modified resource request; and

send the modified resource request to the first resource provider; and

interconnect interface to perform address range check on the second address and tag validation on the resource-monitoring and resource-control tags in the modified resource request to ensure the modified request is proper for the first resource provider;

wherein the first resource provider is to use the resource monitoring tag and the resource control tag to count a number of cache lines in use by the first non-core requestor.

2. The system of claim 1 , wherein the first resource provider is to track a quantity of the shared resources used by one or more core and non-core requestors based on the resource-monitoring tag associated with the one or more core and non-core requestors.

3. The system of claim 1 , wherein the first resource provider to adjust a quantity of the shared resources available to one or more core and non-core requestors based on the resource-control tag associated with the one or more core and non-core requestors.

4. The system of claim 1 , wherein the non-core requestors comprises network cards, input-output (I/O) devices, graphics cards/accelerators, field-programmable gate arrays (FPGAs), and storage devices.

5. The system of claim 1 , wherein the mapping table is to track the resource-monitoring and resource-control tags of an associated non-core requestor by using a PCIe Bus/Device/Function (B:D:F) identification that uniquely identifies the associated non-core requestor.

6. The system of claim 1 , wherein the mapping table is to track the resource-monitoring and resource-control tags of an associated non-core requestor by using a physical address space identification (PASID) that uniquely identifies the associated non-core requestor, wherein the associated non-core requestor is a compute context that is executing or generating the resource request.

7. The system of claim 1 , wherein the resource-monitoring tags associated with the plurality of core and non-core requestors are selected from a single pool of resource-monitoring tags shared by the plurality of core and non-core requestors.

8. The system of claim 1 , wherein the resource-monitoring tags associated with the plurality of core requestors are selected from a first pool of resource-monitoring tags and the resource-control tags associated with the plurality of non-core requestors are selected from a second pool of resource-control tags.

9. The system of claim 1 , wherein the resource-control tags associated with the plurality of core and non-core requestors are selected from a single pool of resource-control tags.

10. The system of claim 1 , wherein the resource-control tags associated with the plurality of core requestors are selected from a first pool of resource-control tags and the resource-control tags associated with of each plurality of non-core requestors are selected from a second pool of resource-control tags.

11. The system of claim 1 , wherein an operating system (OS) or a virtual machine manager (VMM) running on the OS is to control the shared resources used by one or more non-core resource requestor by modifying the resource-control tag associated with the one or more non-core requestors in the mapping table.

12. The system of claim 1 , wherein the shared resources comprise cache lines in a last level cache (LLC) or level 3 (L3) cache.

13. The system of claim 1 , wherein the shared resources comprise cache lines access bandwidth in a last level cache (LLC) or level 3 (L3) cache.

14. The system of claim 1 , wherein the mapping table and the tagging circuitry are implemented as part of an input-output memory management unit (IOMMU).

15. The system of claim 1 , wherein the mapping table is implemented as a register comprising one pair of resource-monitoring and resource-control tags to be associated with one or more non-core requestors in a same hardware device.

16. The system of claim 1 , wherein the resource-monitoring tag comprises a resource monitoring identification (RMID) and the resource-control tag comprises a class of service identification (CLOS).

17. A method comprising:

providing, by one or more resource providers, shared resources to a plurality of core and non-core requestors within a chip multiprocessor, each of the plurality of core and non-core requestors associated with a respective resource-monitoring tag and a resource-control tag;

storing the resource-monitoring tag and the resource-control tag of each of the non-core requestors in a mapping table;

receiving a resource request sent from a first non-core requestor to a first resource provider the resource request comprising a first address in an address space of the first non-core requestor;

translating the first address to a second address in an address space of the first resource provider;

looking up the resource-monitoring and resource-control tags of the first non-core requestor from the mapping table;

modifying the resource request to replace the first address with the second address and to include the resource-monitoring and resource-control tags of the first non-core requestor to generate a modified resource request;

performing address range check and tag validation to ensure the modified request is proper for the first resource provider;

sending the modified resource request to the first resource provider;

performing address range check on the second address and tag validation on the resource-monitoring and resource-control tags in the modified resource request to ensure the modified request is proper for the first resource provider; and

using the resource monitoring tag and the resource control tag to count a number of cache lines in use by the first non-core requestor.

18. The method of claim 17 further comprising associating the resource-monitoring and resource-control tags of the non-core requestor with a PCIe Bus/Device/Function (B:D:F) address tag that uniquely identifies the non-core requestor.

19. The method of claim 17 further comprising associating the resource-monitoring and resource-control tags of the non-core requestor with a physical address space identification (PASID) that uniquely identifies the non-core requestor, the non-core requestor being a compute context in a hardware device.

20. The method of claim 17 further comprising modifying the stored resource-control tag associated with the non-core requestor to control a quantity of the shared resources that is available to non-core requestor.

21. The method of claim 17 further comprising storing the plurality of resource-monitoring tags and resource-control tags in a mapping table of an input-output memory management unit (IOMMU).

22. The method of claim 17 further comprising storing a single pair of resource-monitoring and resource-control tags in a register, the single pair of resource-monitoring and resource-control tags to be associated all non-core requestors in a hardware device.

23. A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform operations of:

providing, by one or more resource providers, shared resources to a plurality of core and non-core requestors within a chip multiprocessor, each of the plurality of core and non-core requestors associated with a respective resource-monitoring tag and a resource-control tag;

storing the resource-monitoring tag and the resource-control tag of each of the non-core requestors in a mapping table;

receiving a resource request sent from a first non-core requestor to a first resource provider, the resource request comprising a first address in an address space of the first non-core requestor;

translating the first address to a second address in an address space of the first resource provider;

looking up the resource-monitoring and resource-control tags of the first non-core requestor from the mapping table;

modifying the resource request to replace the first address with the second address and to include the resource-monitoring and resource-control tags of the first non-core requestor to generate a modified resource request;

sending the modified resource request to the first resource provider; and

performing address range check on the second address and tag validation on the resource-monitoring and resource-control tags in the modified resource request to ensure the modified request is proper for the first resource provider; and

using the resource monitoring tag and the resource control tag to count a number of cache lines in use by the first non-core requestor.

24. The non-transitory machine-readable medium of claim 23 , wherein the operations further comprise associating the resource-monitoring and resource-control tags of the non-core requestor with a PCIe Bus/Device/Function (B:D:F) address tag that uniquely identifies the non-core requestor.

25. The non-transitory machine-readable medium of claim 23 , wherein the operations further comprise associating the resource-monitoring and resource-control tags of the non-core requestor with a physical address space identification (PASID) that uniquely identifies the non-core requestor, the non-core requestor being a compute context in a hardware device.

26. The non-transitory machine-readable medium of claim 23 , wherein the operations further comprise modifying the stored resource-control tag associated with the non-core requestor to control a quantity of the shared resources that is available to non-core requestor.

27. The non-transitory machine-readable medium of claim 23 , wherein the operations further comprise storing the plurality of resource-monitoring tags and resource-control tags in a mapping table of an input-output memory management unit (IOMMU).

28. The non-transitory machine-readable medium of claim 23 , wherein the operations further comprise storing a single pair of resource-monitoring and resource-control tags in a register, the single pair of resource-monitoring and resource-control tags to be associated all non-core requestors in a hardware device.

29. The non-transitory machine-readable medium of claim 23 , wherein the resource-monitoring tag comprises a resource monitoring identification (RMID) and the resource-control tag comprises a class of service identification (CLOS).

30. The non-transitory machine-readable medium of claim 23 , wherein the operations further comprise:

tracking a quantity of a shared resource used by one or more core and non-core requestors based on a resource-monitoring tag associated with the one or more core and non-core requestors; and

limiting the quantity of the shared resource available to the one or more core and non-core requestors based on a resource-control tag associated with the one or more core and non-core requestors.