IP Library › Granted Patent US 10,192,081
Granted Patent B2
US 10,192,081 · App. 15/637,111 · Granted Jan 29, 2019

Interface between near field communications (NFC) controller and secure element

Inventors: Gernot Hueber (Linz, AT); Ian Thomas Macnamara (Graz, AT); Ulrich Neffe (Albersdorf-Prebuch, AT)
Assignee: NXP B.V.
G06K7/10237H04B5/0031H04B5/0056H04L49/102H04L63/0492H04W4/80
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Quick Facts
Patent No.
US 10,192,081
App. No.
15/637,111
Granted
Jan 29, 2019
Kind
B2
Abstract

Embodiments of an interface system for interfacing between an NFC controller and a secure element are disclosed. In one embodiment, an interface system includes an interface memory, an interface controller, an NFC controller interface configured to exchange data between the interface system and an NFC controller, and a secure element interface configured to exchange data between the interface system and a secure element.

Claims (34)

1. An interface system for interfacing between an NFC controller and a secure element, the interface system comprising:

an interface memory;

an interface controller;

an NFC controller interface configured to exchange data between the NFC controller interface of the interface system and an NFC controller bus interface included in the NFC controller; and

a secure element interface configured to exchange data between the secure element interface of the interface system and a secure element bus interface included in the secure element.

2. The interface system of claim 1 , wherein the NFC controller interface includes a parallel bus interface and the secure element interface includes a parallel bus interface.

3. The interface system of claim 2 , wherein the parallel bus interface of the NFC controller interface is at least 8-bits wide and wherein the parallel bus of the secure element interface is at least 8-bits wide.

4. The interface system of claim 1 , wherein the interface memory is a shared memory.

5. The interface system of claim 1 wherein the interface memory is a first-in first-out (FIFO) memory.

6. The interface system of claim 1 , wherein the interface memory is a random access memory (RAM) with buffer handling.

7. The interface system of claim 1 , wherein the interface memory is a random access memory (RAM) that includes multiple buffers.

8. The interface system of claim 7 , wherein the interface controller is a configured to implement traffic prioritization.

9. The interface system of claim 7 , wherein the interface controller is a configured to implement traffic pipelining.

10. The interface system of claim 7 , wherein the interface controller is a configured to implement multiple logical data channels.

11. A secure element integrated circuit (IC) that includes the interface system of claim 1 .

12. A near field communications (NFC) controller integrated circuit (IC) that includes the interface system of claim 1 .

13. An interface system for interfacing between an NFC controller and a secure element, the interface system comprising:

an interface memory;

an interface controller;

an NFC controller interface configured to exchange data between the NFC controller interface of the interface system and an NFC controller bus interface included in the NFC controller and comprising a data bus interface, an address bus interface, and control bus interface, wherein the data bus interface is a parallel interface; and

a secure element interface configured to exchange data between the secure element interface of the interface system and a secure element bus interface included in the secure element and comprising a data bus interface, an address bus interface, and control bus interface, wherein the secure element data interface is a parallel interface.

14. The interface system of claim 13 , wherein the data bus interface of the NFC controller interface is at least 8-bits wide and wherein the data bus of the secure element interface is at least 8-bits wide.

15. The interface system of claim 13 , wherein the interface memory is a shared memory.

16. The interface system of claim 13 , wherein the interface memory is a first-in first-out (FIFO) memory.

17. The interface system of claim 13 , wherein the interface memory is a random access memory (RAM) with buffer handling.

18. The interface system of claim 13 , wherein the interface memory is a random access memory (RAM) that includes multiple buffers.

19. An method for communicating data between an NFC controller and a secure element, the method comprising:

receiving data at a secure element interface of an interface system from a secure element bus interface included in the secure element;

passing the data from the secure element interface to an interface memory of the interface system;

passing the data from the interface memory to an NFC controller interface of the interface system; and

passing the data from the NFC controller interface of the interface system to an NFC controller bus interface included in the NFC controller.

20. The method of claim 19 wherein:

receiving data at a secure element interface of an interface system from a secure element bus interface included in the secure element comprising receiving the data from a parallel bus that is connected to the secure element bus interface included in the secure element; and

passing the data from the NFC controller interface of the interface system to an NFC controller bus interface included in the NFC controller comprises passing the data to a parallel bus that is connected to the NFC controller bus interface included in the NFC controller.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE FIRST ASSIGNOR'S NAME PREVIOUSLY RECORDED ON REEL 042864 FRAME 0326. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 12, 2017
From: HUEBER, GERNOT; MACNAMARA, IAN THOMAS; NEFFE, ULRICH
To: NXP B.V.
Reel/Frame 043164/0337 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2017
From: HUEBERT, GERNOT; MACNAMARA, IAN THOMAS; NEFFE, ULRICH
To: NXP B.V.
Reel/Frame 042864/0326 →
Continuity (1)
Related Publication 20190005284A1 · Jan 3, 2019