IP Library Granted Patent US 10,268,502
Granted Patent B2
US 10,268,502 · App. 15/637,476 · Granted Apr 23, 2019

Methods and apparatus to perform atomic transactions in nonvolatile memory under hardware transactional memory

Inventors: Kshitij A. Doshi (Tempe, AZ); Vadim Sukhomlinov (Santa Clara, CA); Roman Dementiev (Heidelberg, DE)
Assignee: Intel Corporation
G06F9/466G06F9/30072G06F9/30087G06F12/0833
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Quick Facts
Patent No.
US 10,268,502
App. No.
15/637,476
Granted
Apr 23, 2019
Kind
B2
Abstract

A method to perform atomic transactions in non-volatile memory (NVM) under hardware transactional memory is disclosed. The method includes tracking an order among transaction log entries that includes arranging transaction logs in an order that is based on when corresponding transactions were executed. Moreover, the method includes, using the ordered transaction logs to recover data states of the nonvolatile memory, by identifying a first unconfirmed transaction associated with a transaction completion uncertainty event based on a corresponding one of the transaction logs including a first commit marker but not including a confirm marker, undoing first ones of the transactions in reverse time order starting at a last transaction that recorded a second commit marker, up to and including the first unconfirmed transaction that recorded the first commit marker, and redoing second ones of the transactions in forward time order from a first confirmed transaction up to but not including the first unconfirmed transaction that recorded the first commit marker.

Claims (41)

1. An apparatus to perform atomic transactions in nonvolatile memory (NVM) under hardware transactional memory, the apparatus comprising:

a transaction tracker to arrange transaction logs in an order based on when corresponding transactions were executed; and

a state recoverer to use the ordered transaction logs to recover data states of the nonvolatile memory by:

identifying a first unconfirmed transaction associated with a transaction completion uncertainty event based on a corresponding one of the transaction logs including a first commit marker but not including a confirm marker,

undoing first ones of the transactions in reverse time order starting at a last transaction that recorded a second commit marker, up to and including the first unconfirmed transaction that recorded the first commit marker, and

redoing second ones of the transactions in forward time order from a first confirmed transaction up to but not including the first unconfirmed transaction that recorded the first commit marker.

2. The apparatus of claim 1 , further including an excluder to exclude at least one of a load instruction or a store instruction associated with a physical address that is in a range of excluded addresses corresponding to hardware transactional memory.

3. The apparatus of claim 2 , wherein the at least one of the load instruction or the store instruction is a non-transactional instruction based on the physical address being in the range of excluded addresses.

4. The apparatus of claim 2 , wherein the transaction logs are stored in the range of excluded addresses.

5. The apparatus of claim 1 , wherein the transaction tracker includes a monotonic counter to generate sequenced transaction logs.

6. The apparatus of claim 1 , wherein the transaction tracker includes a time value token provider to generate a time value token that is written in a transaction log record for each transaction.

7. The apparatus of claim 1 , wherein a first one of the transaction logs corresponding to the confirmed transaction includes a confirm marker based on execution of a CONFIRM instruction of the confirmed transaction after execution of an XEND instruction of the confirmed transaction.

8. The apparatus of claim 1 , wherein the transactions are caused to complete in an order based on a COMMIT operation sequence number.

9. The apparatus of claim 1 , wherein XBEGIN, XEND, COMMIT and CONFIRM operations are executed for the corresponding transactions that record both a commit and a confirm marker.

10. A method to perform atomic transactions in NVM under hardware transactional memory, the method comprising:

arranging transaction logs in an order based on when transactions were committed; and

recovering data states based on the ordered transaction logs by:

identifying a first unconfirmed transaction associated with the transaction completion uncertainty event based on a corresponding one of the transaction logs including a first commit marker but not including a confirm marker,

undoing first ones of the transactions in reverse time order starting at a last transaction that recorded a second commit marker, up to and including the first unconfirmed transaction that recorded the first commit marker, and

redoing second ones of the transactions in forward time order from a first confirmed transaction up to but not including the first unconfirmed transaction that recorded the first commit marker.

11. The method of claim 10 , further including excluding at least one of a load instruction or a store instruction associated with a physical address that is in a range of excluded addresses corresponding to hardware transactional memory.

12. The method of claim 11 , wherein the at least one of the load instruction or the store instruction is a non-transactional instruction based on the physical address being in the range of excluded addresses.

13. The method of claim 11 , further including storing the transaction log entries in the range of physical addresses.

14. The method of claim 10 , wherein the arranging includes generating sequenced transaction logs based on count values corresponding to XBEGIN instructions of transactions and determining when the transactions were executed based on the sequenced transaction logs.

15. The method of claim 10 , wherein the arranging includes generating a time value token and writing the time value token in one of the transaction logs for a corresponding one of the transactions.

16. The method of claim 10 , wherein a first one of the transaction logs corresponding to the confirmed transaction includes a confirm marker based on execution of a CONFIRM instruction of the confirmed transaction after execution of an XEND instruction of the confirmed transaction.

17. The method of claim 10 , further including causing the transactions to complete in an order based on a COMMIT operation sequence number.

18. The method of claim 10 , wherein a XBEGIN operation, a XEND operation, a COMMIT operation and a CONFIRM operation are executed for ones of the corresponding transactions that record both a commit marker and a confirm marker.

19. A non-transitory computer readable storage medium comprising instructions that, when executed, cause a machine to at least:

track an order among transaction log entries including arranging transaction logs in an order based on when corresponding transactions were executed; and

use the ordered transaction logs to recover data states of the nonvolatile memory by:

identifying a first unconfirmed transaction associated with a transaction completion uncertainty event based on a corresponding one of the transaction logs including a first commit marker but not including a confirm marker,

undoing first ones of the transactions in reverse time order starting at a last transaction that recorded a second commit marker, up to and including the first unconfirmed transaction that recorded the first commit marker, and

redoing second ones of the transactions in forward time order from a first confirmed transaction up to but not including the first unconfirmed transaction that recorded the first commit marker.

20. The computer readable data storage medium claim 19 further causing a machine to at least exclude at least one of a load instruction associated with a physical address that is in a range of excluded addresses corresponding to hardware transactional memory.

21. The computer readable storage medium of claim 20 , wherein the at least one of the load instruction or the store instructions is a non-transactional instruction based on the physical address being in the range of excluded addresses.

22. The computer readable storage medium of claim 20 , wherein the transaction logs are stored in the range of physical addresses.

23. The computer readable storage medium of claim 19 , wherein arranging an order among transaction log entries includes generating sequenced transaction logs based on count values corresponding to XBEGIN instructions of transactions and determining when the transactions were executed based on the sequenced transaction logs.

24. The computer readable storage medium of claim 19 , wherein arranging an order among transaction log entries includes generating a time value token and writing the time value token in one of the transaction logs for a corresponding one of the transactions.

25. The computer readable storage medium of claim 19 , wherein the transactions are caused to complete in time order based on a COMMIT operation sequence number.

26. The computer readable storage medium of claim 19 , wherein XBEGIN, XEND, COMMIT and CONFIRM operations are executed for the corresponding transactions that record both a commit and a confirm marker.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072792/0414 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 31, 2017
From: DOSHI, KSHITIJ A.; SUKHOMLINOV, VADIM; DEMENTIEV, ROMAN
To: INTEL CORPORATION
Reel/Frame 043141/0226 →
Continuity (1)
Related Publication 20190004851A1 · Jan 3, 2019