Optical communication interface utilizing N-dimensional double square quadrature amplitude modulation
The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using nDSQ format(s) over optical communication networks. In certain embodiments, the communication interface is used by various devices, such as spine switches and leaf switches, within a spine-leaf network architecture, which allows large amount of data to be shared among servers.
1. A method for processing n-dimensional double square quadrature amplitude modulation (nDSQ) coded signals for pulse amplitude modulation with m levels (PAMm), the method comprising:
receiving optical signals via an optical channel;
converting the optical signals to analog signals;
converting the analog signals to nDSQ symbols using an analog-to-digital converter (DAC), the nDSQ symbols including a first nDSQ symbol;
dividing the nDSQ symbols into a first segment representing most significant bits (MSBs) and a second segment representing least significant bits (LSBs);
processing the second segment to generate an error indication based at least on a parity check;
generating PAM (m/2) data using the first segment and the error indication; and
mapping the PAM (m/2) data to the MSBs bits;
wherein n is associated with a number of dimensions and is 2 or greater, and m is 2 or greater.
2. The method of claim 1 further comprising amplifying the optical signals.
3. The method of claim 1 further comprising decoding the second segment using a Wagner decoder.
4. The method of claim 1 further comprising adding the MSBs and LSBs into a decoded data stream.
5. The method of claim 1 further comprising performing Gray-mapping on the PAM(m/2) data on MSB bits.
6. The method of claim 1 wherein m is 8, 12, 16, or 32.
7. The method of claim 1 further comprising receiving the nDSQ symbols through a channel.
8. The method of claim 1 wherein the nDSQ symbols are divided by a splicer.
9. The method of claim 1 further comprising determining whether to add “1” to the first segment based at least on the error indication.
10. The method of claim 1 wherein the nDSQ symbols are characterized by a data rate of at least 25 Gbps.
11. The method of claim 1 further comprising generating a clock signal based on the analog signals.
12. The method of claim 1 wherein the LSBs are encoded by Bose Chaudhuri Hocquenghem (BCH) and/or Reed Solomon (RS) coding scheme.
13. A method for processing n-dimensional double square quadrature amplitude modulation (nDSQ) coded signals for pulse amplitude modulation with m levels (PAMm), the method comprising:
receiving optical signals via an optical channel;
converting the optical signals to analog signals;
generating clock signals based on the analog signals;
converting the analog signals to nDSQ symbols using an analog-to-digital converter (DAC);
dividing the nDSQ symbols into a first segment representing most significant bits (MSBs) and a second segment representing least significant bits (LSBs);
decoding the second segment to generate an error indication based at least on a parity check; and
generating PAM (m/2) data using the first segment and the error indication;
wherein n is associated with a number of dimensions and is 2 or greater, and m is 2 or greater.
14. The method of claim 13 wherein further comprising processing the analog signals with a phase-locked loop.
15. The method of claim 13 further comprising applying maximum likelihood correction using the error indication.
16. The method of claim 13 further comprising processing the MSBs with a PAM4 slicer.
17. A communication device for processing n-dimensional double square quadrature amplitude modulation (nDSQ) coded signals for pulse amplitude modulation with m levels (PAMm), the communication device coupled with the network, the communication device comprising:
an analog to digital converter (ADC) for converting analog signals to nDSQ symbols;
a channel for receiving the nDSQ symbols, the nDSQ symbols including a first nDSQ symbol;
a PAMm splicer configured to divide the nDSQ symbol into a first segment representing most significant bits (MSBs) and a second segment representing least significant bits (LSBs);
a decoder configured to process the second segment to generate an error indication based at least on a parity check;
a multiplexer configured to generate PAM (m/2) data using the first segment and the error indication; and
a de-mapping module configured to map the PAM (m/2) data to the MSBs bits;
wherein n is associated with a number of dimensions and is 2 or greater, and m is 2 or greater.
18. The device of claim 17 further comprising a linear trans-impedance amplifier (TIA) for converting optical signals received from a source to the analog signals.
19. The device of claim 17 further comprising a PCI-e interface.
20. The device of claim 17 further comprising a phase-lock loop for generating clock signals based on the analog signals.