Semiconductor device having metal gate
The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.
1. A gate stack structure, comprising:
a substrate;
a dielectric layer disposed on the substrate;
a gate trench disposed in the dielectric layer;
a bottom barrier layer disposed in the gate trench;
a first work function metal layer disposed on the bottom barrier layer;
a second work function metal layer partially disposed on the first work function metal layer in the gate trench, wherein parts of the second work function metal layer contacts the bottom barrier layer directly in the gate trench;
a top barrier layer disposed on the second work function metal layer; and
a titanium silicide nitride (TiSiN) layer, disposed on the top barrier layer and directly contacts the top barrier layer, wherein a topmost surface of the titanium silicide nitride layer is lower than a top surface of the dielectric layer.
2. The gate stack structure of claim 1 , wherein the distance between a top surface of the substrate and a top surface of the gate trench is between 300 angstroms and 500 angstroms.
3. The gate stack structure of claim 1 , wherein the bottom barrier layer comprises a titanium nitride (TiN) or a tantalum nitride (TaN) layer.
4. The gate stack structure of claim 1 , wherein the first work function metal layer comprises a titanium aluminum (TiAl) layer.
5. The gate stack structure of claim 1 , wherein the top barrier layer comprises a titanium nitride (TiN) layer.
6. The gate stack structure of claim 1 , further comprising a conductive layer, disposed on the titanium silicide nitride layer and fills up the gate trench.