IP Library › Granted Patent US 10,192,683
Granted Patent B2
US 10,192,683 · App. 15/644,185 · Granted Jan 29, 2019

Multilayer capacitor and board having the multilayer capacitor mounted thereon

Inventors: Heung Kil Park (Suwon-si, KR); Se Hun Park (Suwon-si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G2/065H01G4/005H01G4/12H01G4/232H01G4/30
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Quick Facts
Patent No.
US 10,192,683
App. No.
15/644,185
Granted
Jan 29, 2019
Kind
B2
Abstract

A multilayer capacitor includes a capacitor body, dielectric layers and a plurality of first internal electrodes and second internal electrodes forming a portion of the capacitor body, the plurality of first internal electrodes and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween, the capacitor body further having a first surface and a second surface opposing each other, a third surface and a fourth surface opposing each other, and a fifth surface and a sixth surface opposing each other, the first internal electrodes and the second internal electrodes being exposed through at least the third surface and the fourth surface, respectively, an insulating layer disposed in the first surface of the capacitor body, a buffer layer at least partially covering the insulating layer, and a first terminal electrode and a second terminal electrode spaced apart from each other.

Claims (32)

1. A multilayer capacitor, comprising:

a capacitor body including dielectric layers and a plurality of first internal electrodes and second internal electrodes, the plurality of first internal electrodes and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween, the capacitor body further having a first surface and a second surface opposing each other, a third surface and a fourth surface each connected to each of the first surface and the second surface and the third surface and the fourth surface opposing each other, and a fifth surface and a sixth surface each connected to each of the first surface and the second surface, each of the fifth surface and the sixth surface connected to each of the third surface and the fourth surface, and the fifth surface and the sixth surface opposing each other, the first internal electrodes and the second internal electrodes being exposed through at least the third surface and the fourth surface, respectively;

an insulating layer disposed on the first surface of the capacitor body;

a buffer layer at least partially covering the insulating layer;

a first terminal electrode and a second terminal electrode extended from the third surface and the fourth surface of the capacitor body to the buffer layer, respectively, and spaced apart from each other; and

a first external electrode and a second external electrode disposed on the third surface and the fourth surface of the capacitor body, respectively, so that on a same side of the capacitor body at least a portion of at least one of the insulating layer or the buffer layer is arranged between at least one of the first external electrode or the second external electrode and at least one of the first terminal electrode or the second terminal electrode, respectively.

2. The multilayer capacitor of claim 1 , further comprising plating layers disposed on the first terminal electrode and the second terminal electrode.

3. The multilayer capacitor of claim 1 , wherein the dielectric layers, the first internal electrodes, and the second internal electrodes are stacked in a direction perpendicular to a mounting surface.

4. The multilayer capacitor of claim 1 , wherein the first surface of the capacitor body is a mounting surface.

5. The multilayer capacitor of claim 1 , wherein the insulating layer is formed of a first insulating layer and a second insulating layer spaced apart from each other in a direction in which the third surface and the fourth surface of the capacitor body are connected to each other.

6. The multilayer capacitor of claim 1 , wherein each of the first external electrode and the second external electrode includes a first connection portion and a second connection portion disposed on the third surface and the fourth surface of the capacitor body, respectively, and a first band portion and a second band portion extended from the first connection portion and the second connection portion to portions of the first surface and the second surface of the capacitor body and portions of the fifth surface and the sixth surface thereof.

7. A board having a multilayer capacitor mounted thereon, the board comprising:

a substrate including a first electrode pad and a second electrode pad, the first electrode pad and the second electrode pad being spaced apart from each other; and

the multilayer capacitor of claim 1 mounted on the substrate and the first terminal electrode and the second terminal electrode are connected to the first electrode pad and the second electrode pad, respectively.

8. The multilayer capacitor of claim 1 , wherein the insulating layer is composed of a material different than the dielectric layers.

9. The multilayer capacitor of claim 8 , wherein the material includes a thermosetting resin.

10. The multilayer capacitor of claim 1 , wherein the first and second terminal electrodes are each composed of a material different than the first and second external electrodes, respectively.

11. The multilayer capacitor of claim 10 , wherein the material includes a conductive metal and a conductive resin.

12. A multilayer capacitor, comprising:

a capacitor body including dielectric layers and a plurality of first internal electrodes and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween,

an insulating layer disposed on one surface of the capacitor body;

a buffer layer at least partially covering the insulating layer;

a first terminal electrode and a second terminal electrode extended from a first surface and a second surface of the capacitor body to the buffer layer, respectively, and spaced apart from each other; and

a first external electrode and a second external electrode disposed on the first surface and the second surface of the capacitor body, respectively, so that on a same side of the capacitor body at least a portion of at least one of the insulating layer or the buffer layer is arranged between at least one of the first external electrode or the second external electrode and at least one of the first terminal electrode or the second terminal electrode, respectively.

13. The multilayer capacitor of claim 12 , wherein the insulating layer includes a single insulating layer disposed on the one surface of the capacitor body.

14. The multilayer capacitor of claim 12 , wherein the insulating layer includes more than one insulating layer disposed on the one surface of the capacitor body.

15. The multilayer capacitor of claim 14 , wherein the more than one insulating layer disposed on the one surface of the capacitor body are spaced apart from one another.

16. The multilayer capacitor of claim 12 , further comprising plating layers disposed on the first terminal electrode and the second terminal electrode.

17. The multilayer capacitor of claim 12 , wherein the insulating layer is composed of a material different than the dielectric layers.

18. The multilayer capacitor of claim 17 , wherein the material includes a thermosetting resin.

19. The multilayer capacitor of claim 12 , wherein the first and second terminal electrodes are each composed of a material different than the first and second external electrodes, respectively.

20. The multilayer capacitor of claim 19 , wherein the material includes a conductive metal and a conductive resin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2017
From: PARK, HEUNG KIL; PARK, SE HUN
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 043125/0877 →
Priority Claims (1)
KR 10-2016-0177111 · Dec 22, 2016 · national
Continuity (1)
Related Publication 20180182545A1 · Jun 28, 2018