Self-aligned back side deep trench isolation structure
A pixel sensor device is disclosed. The device includes a shallow trench isolation structure, a well region and a backside isolation structure. The well region and diode region is adjacent to the shallow trench isolation structure. The backside isolation structure is self-aligned with and arranged over the shallow trench isolation structure. The backside isolation structure is adjacent to the diode region.
1. A pixel sensor device comprising:
a shallow trench isolation structure;
a diode region in direct contact with the shallow trench isolation structure;
a well region within the diode region and in direct contact with the shallow trench isolation structure; and
a backside isolation structure self-aligned with and arranged over the shallow trench isolation structure, the backside isolation structure is adjacent to the diode region.
2. The device of claim 1 , wherein the backside isolation structure includes a backside fill material.
3. The device of claim 2 , wherein the backside fill material is conductive.
4. The device of claim 2 , wherein the backside fill material is insulative.
5. The device of claim 1 , further comprising a polysilicon region adjacent the well region, below the backside isolation structure, and above the shallow trench isolation structure.
6. The device of claim 1 , wherein the well region includes a source/drain region.
7. The device of claim 1 , wherein a backside of the diode region is coplanar with a backside of the backside isolation structure.
8. The device of claim 1 , further comprising a gate positioned adjacent and under at least a portion of the well region.
9. The device of claim 1 , further comprising an inter layer dielectric layer (ILD) under the well region.
10. The device of claim 1 , further comprising a contact etch stop layer located under the well region.
11. A pixel sensor device comprising:
a shallow trench isolation structure extending into a frontside of a semiconductor substrate;
a polysilicon region positioned above the shallow trench isolation structure;
a diode region in direct contact with the shallow trench isolation structure;
a well region in direct contact with the shallow trench isolation structure and within the diode region;
a source/drain region adjacent to the shallow trench isolation structure and within the well region; and
a backside isolation structure self-aligned with and arranged over the shallow trench isolation structure, the backside isolation structure is adjacent to the diode region, and a backside of the backside isolation structure is coplanar with a backside of the semiconductor substrate.
12. The pixel sensor device of claim 11 , wherein the shallow trench isolation structure, the polysilicon region, and the backside isolation structure collectively pass through an entire thickness of the semiconductor substrate.
13. The pixel sensor device of claim 11 , wherein the shallow trench isolation (STI) structure has STI sidewalls, and the polysilicon region has polysilicon sidewalls that are aligned with the STI sidewalls.
14. The pixel sensor device of claim 13 , wherein the backside isolation structure has backside isolation sidewalls which are angled at a first sidewall angle which is offset by a non-zero angle relative to a second sidewall angle at which the STI sidewalls and the polysilicon sidewalls are aligned, wherein a bottom surface of the backside isolation structure and a top surface of the polysilicon region contact above a top surface of the well region.
15. The pixel sensor device of claim 12 , wherein the shallow trench isolation structure and the backside isolation structure are each made of dielectric material.
16. A pixel sensor device comprising:
a semiconductor substrate having a substrate thickness as measured between a frontside of the substrate and a backside of the substrate;
a gate disposed over the frontside of the substrate and configured to selectively transfer charge which is stored by a photodiode arranged in the substrate;
a shallow trench isolation structure made of a first dielectric material extending into the frontside of the substrate; and
a backside isolation structure self-aligned with and arranged under the shallow trench isolation structure, wherein a bottom surface of the backside isolation structure is coplanar with the backside of the substrate, wherein the shallow trench isolation (STI) structure has STI sidewalls angled at a first sidewall angle, and the backside isolation structure has backside isolation sidewalls angled at a second sidewall angle that is offset by a non-zero angle relative to the first sidewall angle.
17. The pixel sensor device of claim 16 , further comprising:
a conductive region separating the shallow trench isolation structure and the backside isolation structure, wherein the shallow trench isolation structure, the conductive region, and the backside isolation structure collectively pass through an entire thickness of the substrate.
18. The pixel sensor device of claim 17 , wherein the shallow trench isolation (STI) structure has STI sidewalls, and the conductive region has conductive sidewalls that are aligned with the STI sidewalls.
19. The pixel sensor device of claim 1 , wherein the shallow trench isolation (STI) structure has STI sidewalls angled at a first sidewall angle, and the backside isolation structure has backside isolation sidewalls angled at a second sidewall angle that is offset by a non-zero angle relative to the first sidewall angle.
20. The pixel sensor device of claim 17 , wherein the conductive region has conductive sidewalls that are aligned with the STI sidewalls.