Shielded fan-out packaged semiconductor device and method of manufacturing
Several aspects of the present technology are directed toward fan-out packaged semiconductor devices having an integrated shield to protect against electromagnetic interference and methods of manufacturing such devices. The shield can be constructed by forming a conductive wall on a redistribution structure and disposing a conductive cap on an upper surface of an encapsulant. The conductive wall and the conductive cap are electrically connected to each other. By forming the conductive wall directly on the redistribution structure and separately disposing the conductive cap onto an upper surface of the encapsulant, an electromagnetic shield can be readily formed using wafer-level or panel-level processing techniques that are efficient and cost-effective. Several embodiments of semiconductor devices in accordance with the present technology accordingly shield the integrated circuitry of semiconductor dies from electromagnetic interference.
1. A method of packaging a semiconductor device, comprising:
electrically coupling a semiconductor die to die contacts at a first side of a redistribution structure, wherein the die contacts are electrically coupled to ball pads at a second side of the redistribution structure;
forming a conductive wall on the first side of the redistribution structure by printing a conductive material or reflowing a conductive paste, wherein the conductive wall is electrically coupled to at least one shield contact at the first side of the redistribution structure, and wherein the shield contact is electrically coupled to a ball pad at the second side of the redistribution structure;
depositing an encapsulant over the semiconductor die, wherein the encapsulant has an upper surface;
removing a portion of the encapsulant and a portion of the conductive wall to form the upper surface on the encapsulant over the semiconductor die and a top surface on the conductive wall, wherein the upper surface of the encapsulant and the top surface of the conductive wall are coplanar; and
disposing a conductive cap onto the upper surface of the encapsulant, wherein the conductive cap is electrically coupled to the conductive wall.
2. The method of claim 1 wherein depositing the encapsulant comprises covering a backside of the semiconductor die with the encapsulant.
3. The method of claim 2 wherein disposing the conductive cap onto the upper surface of the encapsulant comprises adhering a metal plate to the upper surface of the encapsulant and the top surface of the conductive wall.
4. The method of claim 2 wherein disposing the conductive cap onto the upper surface of the encapsulant comprises depositing at least one layer of a conductive material onto the surface of the encapsulant and directly onto the top surface of the conductive wall.
5. The method of claim 2 wherein the redistribution structure comprises a multi-level shield structure, and wherein the method further comprises forming a shield component in the multi-level shield structure that is electrically coupled to the conductive wall and the conductive cap.