Voltage regulators with multiple transistors

1. A voltage regulator, comprising:

a high-side device including first and second transistors each coupled between an input terminal and an intermediate terminal, the first transistor having a higher breakdown voltage than the second transistor, the second transistor having a smaller safe operating area (SOA) than the first transistor, and the second transistor being larger than the first transistor;

a low-side device coupled between the intermediate terminal and a ground terminal; and

a controller configured to drive the high-side and low-side devices to (a) alternately couple the intermediate terminal to the input terminal and the ground terminal and (b) cause the first transistor to control a voltage across the second transistor during switching transitions of the second transistor.

2. The voltage regulator of claim 1 , wherein the controller is further configured to:

turn on the first transistor before turning on the second transistor; and

turn off the first transistor after turning off the second transistor.

3. The voltage regulator of claim 2 , wherein the low-side device includes:

third and fourth transistors each coupled between the intermediate terminal and the ground terminal, the third transistor having a higher breakdown voltage than the fourth transistor;

wherein the controller is further configured to drive the low-side device to cause the third transistor to control a voltage across the fourth transistor during switching transitions of the fourth transistor.

4. The voltage regulator of claim 3 , wherein:

the first transistor has a first drain coupled to the input terminal and a first source coupled to the intermediate terminal;

the second transistor has a second drain coupled to the first drain of the first transistor and a second source coupled to the intermediate terminal, the voltage across the second transistor being a voltage between the second drain and the second source;

the third transistor has a third drain coupled to the intermediate terminal and a third source coupled to the ground terminal; and

the fourth transistor has a fourth drain coupled to the third drain and a fourth source coupled to the ground terminal, the voltage across the fourth transistor being a voltage between the fourth drain and the fourth source.

5. The voltage regulator of claim 2 , wherein:

the first transistor has a first drain coupled to the input terminal and a first source coupled to the intermediate terminal; and

the second transistor has a second drain coupled to the first drain of the first transistor and a second source coupled to the intermediate terminal, the voltage across the second transistor being a voltage between the second drain and the second source.

6. The voltage regulator of claim 2 , wherein a drain junction of the first transistor has a lighter doping profile than a drain junction of the second transistor.

7. The voltage regulator of claim 2 , wherein a channel width of the first transistor is smaller than a channel width of the second transistor.

8. The voltage regulator of claim 2 , wherein an on-state conductance of the first transistor is lower than an on-state conductance of the second transistor.

9. The voltage regulator of claim 2 , wherein a switching time associated with the first transistor is longer than a switching time associated with the second transistor.

10. The voltage regulator of claim 2 , wherein a thickness of a gate oxide of the first transistor is larger than a thickness of a gate oxide of the second transistor.

11. The voltage regulator of claim 1 , further comprising an inductor coupled between the intermediate terminal and an output terminal of the voltage regulator.

12. The voltage regulator of claim 1 , the high-side device further including an additional transistor coupled between the input terminal and the intermediate terminal.

13. The voltage regulator of claim 12 , wherein the controller is further configured to drive the high-side device to cause the additional transistor to control a voltage across the first transistor during switching transitions of the first transistor.

14. A method of operating a voltage regulator, comprising:

driving high-side and low-side devices of the voltage regulator to alternately couple an intermediate terminal of the voltage regulator to an input terminal and a ground terminal; and

driving first and second transistors of the high-side device to cause the first transistor to control a voltage across the second transistor during switching transitions of the second transistor, the first transistor having a higher breakdown voltage than the second transistor, the second transistor having a smaller safe operating area (SOA) than the first transistor, and the second transistor being larger than the first transistor.

15. The method of claim 14 , further comprising:

delaying turning on the second transistor for a predetermined period of time after turning on the first transistor; and

delaying turning off the first transistor for a predetermined period of time after turning off the second transistor.

16. The method of claim 15 , further comprising driving the first and second transistors such that a switching time associated with the first transistor is longer than a switching time associated with the second transistor.

17. The method of claim 15 , further comprising supplying energy from an input voltage source to a load via the high-side device and an inductor coupled to the intermediate terminal.

18. The method of claim 17 , further comprising generating an intermediate voltage at the intermediate terminal by driving the high-side and low-side devices, the intermediate voltage having a rectangular waveform.

19. The method of claim 14 , further comprising driving third and fourth transistors of the low-side device to cause the third transistor to control a voltage across the fourth transistor during switching transitions of the fourth transistor.

20. The method of claim 14 , further comprising driving an additional transistor of the high-side device to cause the additional transistor to control a voltage across the first transistor during switching transitions of the first transistor.