IP Library Granted Patent US 10,622,902
Granted Patent B2
US 10,622,902 · App. 15/665,264 · Granted Apr 14, 2020

Systems and methods for regulating power conversion systems with output detection and synchronized rectifying mechanisms

Inventors: Yaming Cao (Shanghai, CN); Qiang Luo (Shanghai, CN); Yuan Lin (Shanghai, CN); Lieyi Fang (Shanghai, CN)
Assignee: On-Bright Electronics (Shanghai) Co., Ltd.
H02M3/33515H02M1/08H02M3/33507H02M3/33592H02M2001/0009H02M2001/0032H02M2001/0048Y02B70/1433Y02B70/1475Y02B70/1491Y02B70/16
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Quick Facts
Patent No.
US 10,622,902
App. No.
15/665,264
Granted
Apr 14, 2020
Kind
B2
Abstract

System controller and method for regulating a power converter. For example, the system controller includes a first controller terminal and a second controller terminal. The system controller is configured to receive an input signal at the first controller terminal and generate a drive signal at the second controller terminal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter. Additionally, the system controller is further configured to determine whether the input signal remains larger than a first threshold for a first time period that is equal to or longer than a first predetermined duration.

Claims (114)

1. A system controller for regulating a power converter, the system controller comprising:

a first controller terminal; and

a second controller terminal;

wherein the system controller is configured to:

receive an input signal at the first controller terminal; and

generate a drive signal at the second controller terminal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter;

wherein the system controller is further configured to:

determine whether the input signal remains larger than a first threshold for a first time period that is equal to or longer than a first predetermined duration; and

in response to the input signal not being determined to remain larger than the first threshold for the first time period that is equal to or longer than the first predetermined duration, operate with a first mechanism;

wherein, operating with the first mechanism, the system controller is further configured to:

determine whether the input signal remains smaller than a second threshold for a second time period that is equal to or longer than a second predetermined duration; and

in response to the input signal being determined to remain smaller than the second threshold for the second time period that is equal to or longer than the second predetermined duration, change the drive signal at the second controller terminal from a first logic level to a second logic level;

wherein:

the first predetermined duration is larger than zero; and

the second predetermined duration is larger than zero.

2. The system controller of claim 1 wherein:

the system controller is further configured to, in response to the input signal being determined to remain larger than the first threshold for the first time period that is equal to or longer than the first predetermined duration, operate with a second mechanism; and

operating with the second mechanism, the system controller is further configured to:

determine whether the input signal becomes smaller than the second threshold; and

in response to the input signal being determined to become smaller than the second threshold, change the drive signal at the second controller terminal from the first logic level to the second logic level, regardless of whether the input signal remains smaller than the second threshold for the second time period that is equal to or longer than the second predetermined duration.

3. The system controller of claim 2 wherein the system controller is further configured to, after the drive signal is changed from the first logic level to the second logic level in response to the input signal being determined to become smaller than the second threshold regardless of whether the input signal remains smaller than the second threshold for the second time period that is equal to or longer than the second predetermined duration, operate with the first mechanism.

4. The system controller of claim 2 wherein:

the first mechanism is a slow turn-on mechanism; and

the second mechanism is a fast turn-on mechanism.

5. The system controller of claim 1 wherein:

the first logic level is a logic low level; and

the second logic level is a logic high level.

6. The system controller of claim 1 wherein the system controller is further configured to, in response to changing the drive signal from the first logic level to the second logic level, turn on the transistor.

7. The system controller of claim 1 wherein the second threshold is smaller than the first threshold.

8. A system controller for regulating a power converter, the system controller comprising:

a first controller terminal; and

a second controller terminal;

wherein the system controller is configured to:

receive an input signal at the first controller terminal; and

generate a drive signal at the second controller terminal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter;

wherein the system controller is further configured to:

determine whether the input signal remains smaller than or equal to a first threshold and larger than a second threshold for a first time period that is equal to or longer than a first predetermined duration, the second threshold being smaller than the first threshold; and

in response to the input signal not being determined to remain smaller than or equal to the first threshold and larger than the second threshold for the first time period that is equal to or longer than the first predetermined duration, operate with a first mechanism;

wherein, operating with the first mechanism, the system controller is further configured to:

determine whether the input signal remains smaller than a third threshold for a second time period that is equal to or longer than a second predetermined duration; and

in response to the input signal being determined to remain smaller than the third threshold for the second time period that is equal to or longer than the second predetermined duration, change the drive signal at the second controller terminal from a first logic level to a second logic level;

wherein:

the first predetermined duration is larger than zero; and

the second predetermined duration is larger than zero.

9. The system controller of claim 8 wherein:

the system controller is further configured to, in response to the input signal being determined to remain smaller than or equal to the first threshold and larger than the second threshold for the first time period that is equal to or longer than the first predetermined duration, operate with a second mechanism; and

operating with the second mechanism, the system controller is further configured to:

determine whether the input signal becomes smaller than the third threshold; and

in response to the input signal being determined to become smaller than the third threshold, change the drive signal at the second controller terminal from the first logic level to the second logic level, regardless of whether the input signal remains smaller than the third threshold for the second time period that is equal to or longer than the second predetermined duration.

10. The system controller of claim 9 wherein the system controller is further configured to, after the drive signal is changed from the first logic level to the second logic level in response to the input signal being determined to become smaller than the third threshold regardless of whether the input signal remains smaller than the third threshold for the second time period that is equal to or longer than the second predetermined duration, operate with the first mechanism.

11. The system controller of claim 9 wherein:

the first mechanism is a slow turn-on mechanism; and

the second mechanism is a fast turn-on mechanism.

12. The system controller of claim 8 wherein:

the first logic level is a logic low level; and

the second logic level is a logic high level.

13. The system controller of claim 8 wherein the system controller is further configured to, in response to changing the drive signal from the first logic level to the second logic level, turn on the transistor.

14. The system controller of claim 8 wherein:

the third threshold is smaller than the first threshold; and

the third threshold is smaller than the second threshold.

15. A method for regulating a power converter, the method comprising:

receiving an input signal;

processing information associated with the input signal; and

generating a drive signal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter;

wherein the processing information associated with the input signal includes:

determining whether the input signal remains larger than a first threshold for a first time period that is equal to or longer than a first predetermined duration; and

in response to the input signal not being determined to remain larger than the first threshold for the first time period that is equal to or longer than the first predetermined duration, operating with a first mechanism;

wherein the generating a drive signal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter includes, in response to operating with the first mechanism,

determining whether the input signal remains smaller than a second threshold for a second time period that is equal to or longer than a second predetermined duration; and

in response to the input signal being determined to remain smaller than the second threshold for the second time period that is equal to or longer than the second predetermined duration, changing the drive signal from a first logic level to a second logic level;

wherein:

the first predetermined duration is larger than zero; and

the second predetermined duration is larger than zero.

16. The method of claim 15 wherein:

the processing information associated with the input signal further includes:

in response to the input signal being determined to remain larger than the first threshold for the first time period that is equal to or longer than the first predetermined duration, operating with a second mechanism;

the generating a drive signal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter further includes, in response to operating with the second mechanism,

determining whether the input signal becomes smaller than the second threshold; and

in response to the input signal being determined to become smaller than the second threshold, changing the drive signal from the first logic level to the second logic level, regardless of whether the input signal remains smaller than the second threshold for the second time period that is equal to or longer than the second predetermined duration.

17. The method of claim 16 wherein the processing information associated with the input signal further includes, after the drive signal is changed from the first logic level to the second logic level in response to the input signal being determined to become smaller than the second threshold regardless of whether the input signal remains smaller than the second threshold for the second time period that is equal to or longer than the second predetermined duration, operating with the first mechanism.

18. The method of claim 16 wherein:

the first mechanism is a slow turn-on mechanism; and

the second mechanism is a fast turn-on mechanism.

19. The method of claim 15 , and further comprising:

in response to changing the drive signal from the first logic level to the second logic level, turning on the transistor.

20. The method of claim 15 wherein the second threshold is smaller than the first threshold.

21. A method for regulating a power converter, the method comprising:

receiving an input signal;

processing information associated with the input signal; and

generating a drive signal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter;

wherein the processing information associated with the input signal includes:

determining whether the input signal remains smaller than or equal to a first threshold and larger than a second threshold for a first time period that is equal to or longer than a first predetermined duration, the second threshold being smaller than the first threshold; and

in response to the input signal not being determined to remain smaller than or equal to the first threshold and larger than the second threshold for the first time period that is equal to or longer than the first predetermined duration, operating with a first mechanism;

wherein the generating a drive signal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter includes, in response to operating with the first mechanism,

determining whether the input signal remains smaller than a third threshold for a second time period that is equal to or longer than a second predetermined duration; and

in response to the input signal being determined to remain smaller than the third threshold for the second time period that is equal to or longer than the second predetermined duration, changing the drive signal from a first logic level to a second logic level;

wherein:

the first predetermined duration is larger than zero; and

the second predetermined duration is larger than zero.

22. The method of claim 21 wherein:

the processing information associated with the input signal further includes:

in response to the input signal being determined to remain smaller than or equal to the first threshold and larger than the second threshold for the first time period that is equal to or longer than the first predetermined duration, operating with a second mechanism;

wherein the generating a drive signal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter includes, in response to operating with the second mechanism,

determining whether the input signal becomes smaller than the third threshold; and

in response to the input signal being determined to become smaller than the third threshold, changing the drive signal from the first logic level to the second logic level, regardless of whether the input signal remains smaller than the third threshold for the second time period that is equal to or longer than the second predetermined duration.

23. The method of claim 22 wherein the processing information associated with the input signal further includes, after the drive signal is changed from the first logic level to the second logic level in response to the input signal being determined to become smaller than the third threshold regardless of whether the input signal remains smaller than the third threshold for the second time period that is equal to or longer than the second predetermined duration, operating with the first mechanism.

24. The method of claim 22 wherein:

the first mechanism is a slow turn-on mechanism; and

the second mechanism is a fast turn-on mechanism.

25. The method of claim 21 , and further comprising:

in response to changing the drive signal from the first logic level to the second logic level, turning on the transistor.

26. The method of claim 21 wherein:

the third threshold is smaller than the first threshold; and

the third threshold is smaller than the second threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2017
From: CAO, YAMING; LUO, QIANG; LIN, YUAN; FANG, LIEYI
To: ON-BRIGHT ELECTRONICS (SHANGHAI) CO., LTD.
Reel/Frame 043738/0780 →
Priority Claims (3)
CN 2012 1 0118202 · Apr 12, 2012 · national
CN 2014 1 0729533 · Dec 4, 2014 · national
CN 2017 1 0534527 · Jul 3, 2017 · national
Continuity (4)
Continuation In Part 15204324 · Jul 7, 2016
Continuation 14602944 · Jan 22, 2015
Continuation In Part 13466808 · May 8, 2012
Related Publication 20180013352A1 · Jan 11, 2018
Cited By (4)
US 12,261,541 US 12,267,021 US 12,323,066 US 12,506,416