IP Library Granted Patent US 10,262,872
Granted Patent B2
US 10,262,872 · App. 15/665,698 · Granted Apr 16, 2019

Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium

Inventors: Takahiro Miyakura (Toyama, JP); Atsushi Moriya (Toyama, JP); Naoharu Nakaiso (Toyoma, JP); Kensuke Haga (Toyama, JP)
Assignee: KOKUSAI ELECTRIC CORPORATION
H01L21/32055C23C16/045C23C16/24C23C16/30C23C16/45523C23C16/45531C23C16/45534C23C16/52C23C16/56C30B25/005C30B25/02C30B25/06H01L21/02126H01L21/02164H01L21/02233H01L21/02636H01L29/66636
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Quick Facts
Patent No.
US 10,262,872
App. No.
15/665,698
Granted
Apr 16, 2019
Kind
B2
Abstract

There is provided a method of manufacturing a semiconductor device. The method includes: forming a first amorphous silicon film on a substrate in a process chamber; and etching a portion of the first amorphous silicon film using a hydrogen chloride gas under a temperature at which an amorphous state of the first amorphous silicon film is maintained, in the process chamber.

Claims (23)

1. A method of manufacturing a semiconductor device, comprising:

forming a first amorphous silicon film on a substrate in a process chamber; and

etching a portion of the first amorphous silicon film to form an opening in the first amorphous silicon film by using a hydrogen chloride gas under a temperature at which an amorphous state of the first amorphous silicon film is maintained, in the process chamber; and

forming a second amorphous silicon film on the partially etched first amorphous silicon film to fill the opening, in the process chamber.

2. The method of claim 1 , wherein in the act of etching the portion of the first amorphous silicon film, an internal pressure of the process chamber is set higher than an internal pressure of the process chamber when the first amorphous silicon film is formed.

3. The method of claim 1 , wherein in the act of etching the portion of the first amorphous silicon film, an internal pressure of the process chamber is set at a pressure under which uniformity of an etching amount of the first amorphous silicon film is maintained.

4. The method of claim 1 , wherein in the act of etching the portion of the first amorphous silicon film, an internal pressure of the process chamber is set at 1,000 to 50,000 Pa.

5. The method of claim 1 , wherein in the act of etching the portion of the first amorphous silicon film, an internal pressure of the process chamber is set at 10,000 to 40,000 Pa.

6. The method of claim 1 , wherein in the act of etching the portion of the first amorphous silicon film, an internal pressure of the process chamber is set at 20,000 to 30,000 Pa.

7. The method of claim 1 , wherein the first amorphous silicon film is a film doped with a dopant.

8. The method of claim 7 , wherein each of the first amorphous silicon film and the second amorphous silicon film is a film doped with a dopant, and a dopant concentration in the first amorphous silicon film is set higher than a dopant concentration in the second amorphous silicon film.

9. The method of claim 7 , wherein the first amorphous silicon film is a film doped with a dopant and the second amorphous silicon film is a film doped with no dopant.

10. The method of claim 7 , wherein a dopant concentration in the first amorphous silicon film is set at 1.0×10 21 to 1.0×10 22 atoms/cm 3 .

11. The method of claim 1 , further comprising supplying a hydrogen-containing gas to the substrate in the process chamber before performing the act of etching the portion of the first amorphous silicon film.

12. The method of claim 1 , further comprising supplying a hydrogen-containing gas into the process chamber after performing the act of etching the portion of the first amorphous silicon film.

13. The method of claim 1 , wherein a single crystal silicon and an insulating film are exposed on a surface of the substrate.

14. The method of claim 1 , wherein a recess is provided on a surface of the substrate, a bottom portion of the recess is made of a single crystal silicon, and a side portion of the recess is made of an insulating film.

15. The method of claim 14 , wherein in the act of forming the first amorphous silicon film, an epitaxial silicon film is formed at an interface between the first amorphous silicon film and the single crystal silicon, and

in the act of etching the portion of the first amorphous silicon film, the portion of the first amorphous silicon film is etched without etching the epitaxial silicon film.

16. The method of claim 1 , wherein the act of forming the first amorphous silicon film and the act of forming the second amorphous silicon film are performed under the same temperature as the temperature in the act of etching the portion of the first amorphous silicon film.

17. The method of claim 1 , wherein at least a single crystal silicon is exposed on a surface of the substrate,

in the act of forming the first amorphous silicon film, an epitaxial silicon film is formed at an interface between the first amorphous silicon film and the single crystal silicon, and

in the act of etching the portion of the first amorphous silicon film, the portion of the first amorphous silicon film is etched without etching the epitaxial silicon film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2018
From: HITACHI KOKUSAI ELECTRIC INC.
To: KOKUSAI ELECTRIC CORPORATION
Reel/Frame 047995/0462 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2017
From: MIYAKURA, TAKAHIRO; MORIYA, ATSUSHI; NAKAISO, NAOHARU; HAGA, KENSUKE
To: HITACHI KOKUSAI ELECTRIC INC.
Reel/Frame 043154/0454 →
Priority Claims (1)
JP 2016-151950 · Aug 2, 2016 · national
Continuity (1)
Related Publication 20180040475A1 · Feb 8, 2018