IP Library Granted Patent US 10,522,199
Granted Patent B2
US 10,522,199 · App. 15/669,300 · Granted Dec 31, 2019

Apparatuses and methods for scatter and gather

Inventors: Jason T. Zawodny (Grand Rapids, MI); Kelley D. Dobelstein (Seattle, WA); Timothy P. Finkbeiner (Boise, ID); Richard C. Murphy (Boise, ID)
Assignee: Micron Technology, Inc.
G11C7/1006G06F3/061G06F3/0659G06F3/0685G11C7/06G11C7/065G11C7/1036G11C8/12G11C11/4087G11C11/4091G11C11/4096
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Quick Facts
Patent No.
US 10,522,199
App. No.
15/669,300
Granted
Dec 31, 2019
Kind
B2
Abstract

The present disclosure includes apparatuses and methods related to scatter/gather in a memory device. An example apparatus comprises a memory device that includes an array of memory cells, sensing circuitry, and a memory controller coupled to one another. The sensing circuitry includes a sense amplifier and a compute component configured to implement logical operations. A channel controller is configured to receive a block of instructions, the block of instructions including individual instructions for at least one of a gather operation and a scatter operation. The channel controller is configured to send individual instructions to the memory device and to control the memory controller such that the at least one of the gather operation and the scatter operation is executed on the memory device based on a corresponding one of the individual instructions.

Claims (39)

1. An apparatus, comprising:

a memory device, wherein the memory device includes:

an array of memory cells, wherein the array of memory cells includes a plurality of banks of memory cells;

sensing circuitry coupled to the array, the sensing circuitry including a sense amplifier and a compute component configured to implement logical operations; and

a memory controller coupled to the array and sensing circuitry; and

a channel controller configured to:

receive a block of instructions, the block instructions including individual instructions for at least one of a gather operation and a scatter operation and to control the memory controller so that the at least one of the gather operation and the scatter operation is executed on the memory device based on a corresponding one of the individual instructions;

change vector references in the received block of instructions by reading an index (idx) vector array block by block, the idx vector array stored in the memory device;

store a buffer of idx data locally among the plurality of banks; and

group requests together by locality among the plurality of banks so that array and sensing circuitry execution elements can gather and return requests to the channel controller.

2. The apparatus of claim 1 , wherein:

each bank of the plurality of banks includes a respective memory controller, array, and sensing circuity;

the channel controller is coupled to each of the respective memory controllers; and

the memory controller is configured to:

subdivide the block of instructions to manage execution of local individual instructions on banks in the memory device;

monitor completion of the gather operation to ensure in-order execution of the gather operation and to ensure that other memory device operations are complete before starting the gather operation among the plurality of banks of memory cells.

3. The apparatus of claim 1 , wherein the apparatus includes a plurality of memory devices coupled to the channel controller, wherein the channel controller is configured to:

read a buffer of indices in the idx vector array stored to a local buffer;

store the buffer of indices to a local idx buffer;

bin independent bank command buffers for the plurality of banks; and

create individual instructions to communicate to respective ones of the plurality of memory devices.

4. The apparatus of claim 3 , wherein the channel controller communicates with the plurality of memory devices via an out-of-band bus.

5. A method for operating a memory device:

receiving individual instructions associated with at least one of a gather operation and a scatter operation at respective banks in a plurality of banks on the memory device;

receiving to a channel controller connected to a plurality of memory devices a gather operation index (idx) vector;

controlling execution of the individual instructions associated with the at least one of the gather operation and the scatter operation on the memory device by a channel controller;

binning indices from the idx vector to a plurality of bank command buffers local to the channel controller for each of the plurality of memory devices;

sending individual instructions to the plurality of banks to perform the gather operation;

executing the individual instructions using a memory controller on the memory device to perform the at least one of the gather operation and the scatter operation on the respective banks; and

returning requested data results to the channel controller via an out-of-band (OOB) bus.

6. The method of claim 5 , wherein the method comprises:

receiving via the OOB bus requested data from the gather operation from the plurality of memory devices to the channel controller; and

merging the received requested data into a local buffer associated with the channel controller.

7. The method of claim 6 , wherein the method further comprises operating the plurality of memory devices to perform a scatter operation, wherein the method comprises:

reading locations to be written to from command instructions received from the idx vector and data to be written from an x-source vector using sensing circuitry associated with an array of memory cells on each respective bank of the plurality of memory devices to perform the scatter operation local to the bank.

8. The method of claim 7 , wherein the method comprises:

using the channel controller to group write requests by locality for respective banks among the plurality of memory devices;

providing individual instructions associated with the scatter operation to respective banks of the plurality of memory devices such that the individual instructions can be executed locally by respective banks using a memory controller of the bank; and

communicating completion of write requests associated with the scatter operation to the channel controller from respective banks using the OOB bus.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2024
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 068517/0109 →
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2017
From: ZAWODNY, JASON T.; DOBELSTEIN, KELLEY D.; FINKBEINER, TIMOTHY P.; MURPHY, RICHARD C.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 044401/0832 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →
Continuity (3)
Continuation PCTUS2016015027 · Jan 27, 2016
Provisional Application 62112843 · Feb 6, 2015
Related Publication 20170337953A1 · Nov 23, 2017