IP Library Patent Application 15669478
Patent Application
App. No. 15/669,478

TASK PROCESSING DEVICE

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Quick Facts
Patent No.
US None
App. No.
15/669,478
Abstract

A plurality of tasks are processed simultaneously in a plurality of CPUs. A task control circuit is connected to the plurality of CPUs, and when executing a system call signal instruction, each CPU transmits a system call signal to the task control circuit. Upon receipt of a system call signal from a CPU 0, the task control circuit 200 refers to a processor management register, identifies a RUN-task of the CPU 0, selects a READY-task that is to be executed next, switches process data of the RUN-task and process data of the READY-task, and updates processor management information.

Claims (64)

1 . A task processing device comprising:

a task control circuit that manages execution states of a plurality of tasks executed by a plurality of processors,

wherein one or more of the processors transmit a system call signal to the task control circuit when executing a system call instruction,

wherein, upon receiving a first system call signal from a first processor of the processors, the task control circuit executes a task switch of the first processor by:

identifying a first task of the tasks, the first task being executed in the first processor, by referring to processor management information wherein processor IDs of the processors and task IDs of tasks being executed in each of the processors are registered;

selecting autonomously a second task to be executed subsequently;

saving process data of the first task from a processing register of the first processor into a predetermined storage area;

loading process data of the second task into the processing register of the first processor; and

updating the processor management information, and

wherein, when an interruption event to the first processor occurs during execution of the first task but a right for execution of the first task is not transferred, the task control circuit executes a process in response to the interruption event while continuing execution of the first task.

2 . A task processing device comprising:

a task control circuit that manages execution states of a plurality of tasks executed by a plurality of processors,

wherein one or more of the processors transmit a system call signal to the task control circuit when executing a system call instruction,

wherein, upon receiving a first system call signal from a first processor of the processors, the task control circuit executes a task switch of the first processor by:

identifying a first task of the tasks, the first task being executed in the first processor, by referring to processor management information wherein processor IDs of the processors and task IDs of tasks being executed in each of the processors are registered;

selecting autonomously a second task to be executed subsequently;

saving process data of the first task from a processing register of the first processor into a predetermined storage area;

loading process data of the second task into the processing register of the first processor; and

updating the processor management information,

wherein, when a second processor transmits a second system call signal before completion of the task switch in the first processor, the task control circuit withholds the second system call signal, and executes a task switch of the second processor subsequently to the task switch of the first processor, and

wherein, when an interruption event to the first processor occurs during execution of the first task but a right for execution of the first task is not transferred, the task control circuit executes a process in response to the interruption event while continuing execution of the first task.

3 . The task processing device according to claim 1 , wherein, when changing an execution state of a third task to be executed in the first processor from a WAIT state to a READY state in response to the interruption event, the task control circuit lets execution of the first task be continued.

4 . A task processing device comprising:

a task control circuit that manages execution states of a plurality of tasks executed by a plurality of processors, and

a plurality of state registers each associating a task with a processor ID of a processor that is to execute the task,

wherein one or more of the processors transmit a system call signal to the task control circuit when executing a system call instruction,

wherein, upon receiving a first system call signal from a first processor of the processors, the task control circuit executes a task switch of the first processor by:

identifying a first task of the tasks, the first task being executed in the first processor, by referring to processor management information wherein processor IDs of the processors and task IDs of tasks being executed in each of the processors are registered;

selecting autonomously a second task to be executed subsequently from among tasks that are to be executed by the first processor by referring to the state registers,

saving process data of the first task from a processing register of the first processor into a predetermined storage area;

loading process data of the second task into the processing register of the first processor; and

updating the processor management information.

5 . The task processing device according to claim 4 ,

wherein the task control circuit includes comparison circuits connected in multiple stages,

wherein a plurality of first-stage comparison circuits each compare state data of two or more tasks on the basis of a predetermined selection condition, check processor IDs with which the two or more tasks are associated, and output state data of one of the two or more tasks to a second-stage comparison circuit,

wherein a plurality of n-th-stage (n is a natural number of 2 or larger) comparison circuits each compare state data output from a plurality of (n-1)-th stage comparison circuits on the basis of the predetermined selection condition, and output state data of one of the tasks, and

wherein a task identified by a last-stage comparison circuit is selected as a task to be executed.

6 . A task processing device comprising:

a task control circuit that manages execution states of a plurality of tasks executed by a plurality of processors,

wherein one or more of the processors transmit a system call signal to the task control circuit when executing a system call instruction,

wherein, upon receiving a first system call signal from a first processor of the processors, the task control circuit executes a task switch of the first processor by:

identifying a first task of the tasks, the first task being executed in the first processor, by referring to processor management information wherein processor IDs of the processors and task IDs of tasks being executed in each of the processors are registered;

selecting autonomously a second task to be executed subsequently;

saving process data of the first task from a processing register of the first processor into a predetermined storage area;

loading process data of the second task into the processing register of the first processor; and

updating the processor management information, and

wherein, when a second processor transmits a second system call before completion of the task switch in the first processor, the task control circuit withholds the second system call signal, and executes a task switch of the second processor subsequently to the task switch of the first processor.

7 . The task processing device according to claim 2 ,

wherein upon receiving the first system call signal, the task control circuit executes the task switch of the first processor after halting the first processor, and

wherein, when the second processor transmits the second system call signal before completion of the task switch of the first processor, the task control circuit withholds the second system call signal, resumes the first processor and executes the task switch of the second processor upon completion of the task switch of the first processor.

8 . The task processing device according to claim 1 ,

wherein the task control circuit:

identifies a task of the plurality of tasks that is in a READY state by referring to state data output from a plurality of state registers;

changes state data of the first task in a state register from a RUN state to another state when saving process data of the first task; and

sets state data indicating a RUN state in a state register of the second task when loading process data of the second task.

9 . A task processing device comprising:

a task control circuit that manages execution states of a plurality of tasks executed by a processor,

wherein the processor transmits a system call signal to the task control circuit when executing a system call instruction,

wherein upon receiving the system call signal from the processor, the task control circuit executes a task switch of the processor by:

changing state data associated with a task being executed from a RUN state to another state;

selecting autonomously a task to be executed subsequently;

saving process data of the task being executed from a processing register of the processor into a predetermined storage area; and

loading process data of the selected task into the processing register of the processor, and changing the state data of the selected task to the RUN state, and

wherein, when an interruption event occurs during execution of a task but a right for execution of the task is not transferred, the task control circuit executes a process in response to the interruption event while continuing execution of the task.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT APPLICATION SERIAL NUMBER PREVIOUSLY RECORDED AT REEL: 044910 FRAME: 0713. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Oct 23, 2019
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 050809/0158 →
CHANGE OF ADDRESS Recorded Dec 19, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044910/0713 →