Semiconductor devices, memory devices, and related methods
View Patent ↗Electrical contacts may be formed by forming dielectric liners along sidewalls of a dielectric structure, forming sacrificial liners over and transverse to the dielectric liners along sidewalls of a sacrificial structure, selectively removing portions of the dielectric liners at intersections of the dielectric liners and sacrificial liners to form pores, and at least partially filling the pores with a conductive material. Nano-scale pores may be formed by similar methods. Bottom electrodes may be formed and electrical contacts may be structurally and electrically coupled to the bottom electrodes to form memory devices. Nano-scale electrical contacts may have a rectangular cross-section of a first width and a second width, each width less than about 20 nm. Memory devices may include bottom electrodes, electrical contacts having a cross-sectional area less than about 150 nm 2 over and electrically coupled to the bottom electrodes, and a cell material over the electrical contacts.
1. A semiconductor device, comprising:
an electrode;
a first dielectric material over and in contact with the electrode;
a second dielectric material over and in contact with the electrode, the second dielectric material different from the first dielectric material; and
an electrical contact comprising a conductive material over and electrically coupled to the electrode, the electrical contact positioned laterally between and in contact with the first dielectric material and the second dielectric material.
2. The semiconductor device of claim 1 , wherein the first dielectric material comprises one or more of a nitride material and an oxide material.
3. The semiconductor device of claim 1 , wherein the electrical contact comprises a heater for a phase change memory cell material.
4. The semiconductor device of claim 1 , wherein the conductive material of the electrical contact is selected from the group consisting of tungsten, titanium, aluminum, copper, cobalt, and alloys of tungsten, titanium, aluminum, copper, and cobalt.
5. The semiconductor device of claim 1 , wherein the electrical contact is a nano-scale electrical contact having a largest lateral width of about 20 nm or less.
6. The semiconductor device of claim 1 , wherein the electrical contact is further electrically coupled to a memory cell material.
7. The semiconductor device of claim 1 , wherein the first dielectric material and the second dielectric material exhibit etch selectivity relative to each other.
8. A method of forming an electrical contact in a semiconductor device, the method comprising:
forming an electrode;
forming a first dielectric material over and in contact with the electrode;
forming a second, different dielectric material over and in contact with the electrode; and
forming an electrical contact laterally between and in contact with the first dielectric material and the second dielectric material, the electrical contact comprising a conductive material over and electrically coupled to the electrode.
9. The method of claim 8 , wherein forming an electrical contact comprises:
removing a portion of a third dielectric material from between the first dielectric material and the second dielectric material to form a pore over the electrode; and
forming the conductive material within the pore to form the electrical contact.
10. The method of claim 8 , further comprising forming a cell material and a top electrode over the electrical contact to form at least one memory cell.
11. The method of claim 8 , wherein forming the electrical contact comprises forming the electrical contact from material comprising one or more of tungsten, titanium, aluminum, copper, cobalt, and alloys of tungsten, titanium, aluminum, copper, and cobalt.
12. The method of claim 8 , wherein forming the first dielectric material over and in contact with the electrode comprises forming the first dielectric material from material comprising one or more of silicon nitride, aluminum oxide, hafnium silicate, zirconium silicate, hafnium oxide, and zirconium oxide.