Method and structure for multi-cell devices without physical isolation
The present invention relates to multi-cell devices fabricated on a common substrate that are more desirable than single cell devices, particularly in photovoltaic applications. Multi-cell devices operate with lower currents, higher output voltages, and lower internal power losses. Prior art multi-cell devices use physical isolation to achieve electrical isolation between cells. In order to fabricate a multicell device on a common substrate, the individual cells must be electrically isolated from one another. In the prior art, isolation generally required creating a physical dielectric barrier between the cells, which adds complexity and cost to the fabrication process. The disclosed invention achieves electrical isolation without physical isolation by proper orientation of interdigitated junctions such that the diffusion fields present in the interdigitated region essentially prevent the formation of a significant parasitic current which would be in opposition to the output of the device.
1. A multi-cell device comprising:
a monolithic substrate;
ohmic contacts on the substrate for external connection so that a multi-cell current flows between the ohmic contacts;
a plurality of cells fabricated adjacently on the substrate, each cell of the plurality of cells includes a P-N junction creating a diffusion field between P-type material and N-type material, wherein the P-type material and the N-type material are interdigitated; and
a bus structure on the substrate to carry the multi-cell current flow, the bus structure extending from a first side of one of the plurality of cells to an adjacent side of another of the plurality of cells,
wherein the P-N junction of each cell is oriented such that the diffusion field within each P-N junction is in a perpendicular orientation to the multi-cell current flow.
2. The device of claim 1 wherein the P-type material and the N-type material are rectangular and a spacing between a P+ region and a N+ region of the P-N junction of each of the plurality of cells is less than a length of each of the plurality of cells and formed so that the diffusion field is strong enough to impact majority carriers.
3. The device of claim 1 wherein the P-N junctions of the plurality of cells are connected in parallel.
4. The device of claim 1 wherein a spacing between a P+ region and a N+ region of the P-N junction of each of the plurality of cells is less than a width of each of the plurality of cells.
5. The device of claim 1 wherein a length of each P-N junction of the cells is greater than 10 times a spacing between a P+ region and a N+ region of the respective cell.
6. The device of claim 1 where the substrate is selected from the group consisting of a homogeneous bulk semiconductor material, a substrate with an epitaxial layer, and a semi-insulating material with a thin epitaxial layer.
7. The device of claim 1 wherein the multi-cell device is a photovoltaic device.
8. A multi-cell device comprising:
ohmic contacts for two external connections on the multi-cell device having an electrical potential, an electric field in a substrate, and a current flow between the two external connections; and
a plurality of cells fabricated on the substrate, the cells being spaced apart from one another and interconnected by a respective bus extending between sides of adjacent cells, each cell of the plurality of cells having a diffusion field resulting from a presence of photogenerated or bias generated carriers,
wherein the diffusion field is perpendicular to a multi-cell current flow, a parasitic current flow and the electric field in the substrate between the two external connections, and
wherein: a spacing between a P+ region and a N+ region of each of the plurality of cells is less than a length of the respective cell and formed so that the diffusion field is strong enough to prevent majority carrier generation; a region of the substrate directly between each of two adjacent cells and beneath the bus consists of material that is a same composition as material of substrate regions having the plurality of cells disposed thereon; and the region of the substrate directly between each of two adjacent cells and beneath the bus does not have physical isolation.
9. The device of claim 8 wherein a spacing between the P+ region and the N+ region of each of the plurality of cells is less than a width of the respective cell.
10. The device of claim 8 wherein a length of each cell of the plurality of cells is greater than 10 times a spacing between the P+ region and the N+ region of the cell.
11. A semiconductor device comprising:
a substrate;
a first bus bar on the substrate, the first bus bar extending along a first axis;
a first cell on the substrate directly connected to a first side of the first bus bar; and
a second cell on the substrate directly connected to a second side of the first bus bar so that the first bus bar extends from the first cell to the second cell,
wherein each cell has a plurality of elongated continuous P-type regions interdigitated with a plurality of elongated continuous N-type regions along a second axis that is perpendicular to the first axis, the P-type and N-type regions having a small separation distance to form a plurality of P-N junctions that generate a high diffusion field along the second axis to prevent majority carrier generation, and
wherein the region of the substrate directly between the first and second cells and beneath the first bus bar does not have a physical isolation structure.
12. The semiconductor device of claim 11 , further comprising: a second bus bar connected to the first cell and a third bus bar connected to the second cell and wherein a region of the substrate directly between the cells and beneath the bus bars consists of material that is a same composition as material of substrate regions having the first and second cells disposed thereon.
13. The semiconductor device of claim 12 , further comprising a third cell on the substrate connected to the third bus bar, wherein the third cell has a plurality of P-type regions interdigitated with a plurality of N-type regions to form a plurality of P-N junctions.
14. The semiconductor device of claim 12 , further comprising a first ohmic contact connected to the second bus bar and a second ohmic contact connected to the third bus bar for providing external connection with a current flow between the first and second ohmic contacts.