Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a die including a first surface and a second surface opposite to the first surface; a first interconnect structure disposed at the first surface, and including a first dielectric layer and a first conductive member disposed within the first dielectric layer; a molding surrounding the die and the first interconnect structure; a second interconnect structure disposed over the second surface and the molding, and including a second dielectric layer and a second conductive member disposed within the second dielectric layer; a first seal ring is disposed within the second dielectric layer and disposed over the molding; and a conductive bump disposed over the second interconnect structure.
1. A semiconductor structure, comprising:
a die including a first surface and a second surface opposite to the first surface;
a first interconnect structure disposed at the first surface, and including a first dielectric layer and a first conductive member disposed within the first dielectric layer;
a molding surrounding the die and the first interconnect structure;
a second interconnect structure disposed over the second surface and the molding, and including a second dielectric layer and a second conductive member disposed within the second dielectric layer;
a first seal ring is disposed within the second dielectric layer and disposed over the molding; and
a conductive bump disposed over the second interconnect structure.
2. The semiconductor structure of claim 1 , wherein the first seal ring is disposed adjacent to an edge of the second dielectric layer.
3. The semiconductor structure of claim 1 , wherein the first seal ring is vertically extended within the second dielectric layer or is extended along an edge of the second dielectric layer.
4. The semiconductor structure of claim 1 , wherein the first seal ring is electrically connected to the second conductive member or the conductive bump.
5. The semiconductor structure of claim 1 , wherein the first seal ring is connected to an electrical ground.
6. The semiconductor structure of claim 1 , wherein the first seal ring surrounds the second conductive member.
7. The semiconductor structure of claim 1 , wherein a portion of the second dielectric layer is disposed between the first seal ring and the molding.
8. The semiconductor structure of claim 1 , wherein the molding includes oxide or molding compound.
9. The semiconductor structure of claim 1 , further comprising a second seal ring vertically extended within the die or the first dielectric layer.
10. The semiconductor structure of claim 9 , wherein the second seal ring is disposed adjacent to the edge of the die or the molding.
11. The semiconductor structure of claim 9 , wherein a width of the first seal ring is substantially greater than a width of the second seal ring.
12. The semiconductor structure of claim 1 , further comprising a via disposed within and extended through the molding.
13. The semiconductor structure of claim 12 , wherein the first seal ring is electrically isolated from the via.
14. A semiconductor structure, comprising:
a die including a first surface and a second surface opposite to the first surface;
a first dielectric layer disposed at the first surface;
a first conductive member disposed within the first dielectric layer;
a molding surrounding the die and the first dielectric layer;
a second dielectric layer disposed over the second surface and the molding;
a first seal ring is disposed within the second dielectric layer and disposed over the molding; and
a third dielectric layer disposed over the die and the molding.
15. The semiconductor structure of claim 14 , further comprising:
a substrate disposed at the third dielectric layer;
a third conductive member disposed within the third dielectric layer and bonded with the first conductive member.
16. The semiconductor structure of claim 15 , further comprising a second seal ring vertically extended within the third dielectric layer and disposed adjacent to an edge of the third dielectric layer.
17. The semiconductor structure of claim 16 , wherein the first seal ring is vertically aligned with the second seal ring.
18. A method of manufacturing a semiconductor structure, comprising:
providing a die including a first surface and a second surface opposite to the first surface;
disposing a first dielectric layer at the first surface;
forming a first conductive member within the first dielectric layer;
forming a molding around the die and the first dielectric layer;
disposing a second dielectric layer over the second surface and the molding;
forming a second conductive member and a first seal ring within the second dielectric layer; and
disposing a conductive bump over the second dielectric layer, wherein the first seal ring is disposed over the molding.
19. The method of claim 18 , wherein the forming of the first seal ring includes removing a portion of the second dielectric layer adjacent to an edge of the second dielectric layer to form a recess and disposing a conductive material into the recess.
20. The method of claim 18 , further comprising:
providing a substrate;
disposing a third dielectric layer over the substrate;
forming a third conductive member within the third dielectric layer;
forming a second seal ring extended within the third dielectric layer and adjacent to an edge of the third dielectric layer; and
eutectically bonding the first conductive member with the third conductive member.