Semiconductor device and method of manufacturing the same
A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on connection parts between a pad and a lead-out wiring portion, respectively. This feature suppresses crack formation in a coating area where a part of the pad is covered with a surface protective film.
1. A semiconductor device comprising a semiconductor chip that is rectangular in plan view,
the semiconductor chip including:
a plurality of pads arranged along an edge side of the semiconductor chip and each having a protruding portion facing the edge side of the semiconductor chip;
a surface protective film covering a portion of each pad; and
an opening portion exposing a part of a surface of each pad from the surface protective film,
wherein the protruding portion is electrically connected via a contact hole to a wiring provided in a layer below the plurality of pads,
wherein the protruding portion has a first side closer to the edge side of the semiconductor chip, a second side intersecting with the first side, and a third side opposite the second side and intersecting with the first side in plan view, and
wherein at least one of the second side and the third side has a portion that is inclined such that a width of the protruding portion is decreased in a direction extending from the opening portion to the edge side of the semiconductor chip in plan view.
2. The semiconductor device according to claim 1 ,
wherein each of the second side and the third side has a portion that is inclined such that the width of the protruding portion is decreased in the direction extending from the opening portion to the edge side of the semiconductor chip in plan view.
3. The semiconductor device according to claim 1 ,
wherein a length of the first side is shorter than a length of an opposite side of the protruding portion.
4. The semiconductor device according to claim 1 ,
wherein an edge portion of each pad is covered with the surface protective film.
5. The semiconductor device according to claim 4 ,
wherein the surface protective film is covered with a resin.
6. The semiconductor device according to claim 1 ,
wherein the plurality of pads is formed by a film made mainly of aluminum,
wherein the surface protective film is formed by a silicon oxide film and a silicon nitride film.
7. The semiconductor device according to claim 1 ,
wherein a seal ring is formed between the edge side of the semiconductor chip and the plurality of pads.
8. The semiconductor device according to claim 1 ,
wherein the seal ring is formed by a multi-layered wiring including the layer provided with the wiring to which the protruding portion is connected.
9. The semiconductor device according to claim 1 ,
wherein, at each pad in plan view, a width of a coating area of the surface protective film that covers a closest side of the pad to the edge side of the semiconductor chip is larger than a width of a coating area of the surface protective film that covers a farthest side of the pad from the edge side of the semiconductor chip.
10. The semiconductor device according to claim 9 ,
wherein, in plan view, at a first pad closest to a corner of the semiconductor chip among the plurality of pads, a width of a coating area of the surface protective film that covers a closest side of the pad to the corner of the semiconductor chip is larger than the width of the coating area of the surface protective film that covers the farthest side of the first pad from the edge side of the semiconductor chip.
11. A semiconductor device comprising a semiconductor chip that is rectangular in plan view,
the semiconductor chip including:
a plurality of outer pads located closer to an edge side of the semiconductor chip and disposed along the edge side;
a plurality of inner pads located farther from the edge side of the semiconductor chip and disposed along the edge side;
a surface protective film covering portions of the outer pads and the inner pads; and
an opening portion exposing a part of a surface of each outer pad and each inner pad from the surface protective film,
wherein each outer pad has a protruding portion facing a side of the semiconductor chip opposite the edge side of the semiconductor chip,
wherein each inner pad has a protruding portion facing the edge side of the semiconductor chip,
wherein the protruding portion of each outer pad and each inner pad is electrically connected via a contact hole to a wiring provided in a layer below the outer pads and the inner pads,
wherein the protruding portion of each inner pad has a first side closer to the edge side of the semiconductor chip, a second side intersecting with the first side, and a third side opposite the second side and intersecting with the first side in plan view, and
wherein at least one of the second side and the third side has a portion that is inclined such that a width of the protruding portion of the inner pad is decreased in a direction extending from the opening portion to the edge side of the semiconductor chip in plan view.
12. The semiconductor device according to claim 11 ,
wherein each of the second side and the third side has a portion that is inclined such that the width of the protruding portion of the inner pad is decreased in the direction extending from the opening portion to the edge side of the semiconductor chip in plan view.
13. The semiconductor device according to claim 11 ,
wherein a length of the first side is shorter than a length of an opposite side of the protruding portion of the inner pad in plan view.
14. The semiconductor device according to claim 11 ,
wherein an edge portion of each of the outer pads and the inner pads is covered with the surface protective film.
15. The semiconductor device according to claim 11 ,
wherein the protruding portion of each outer pad has a fourth side closer to the side of the semiconductor chip opposite the edge side, a fifth side intersecting with the fourth side, and a sixth side opposite the fifth side and intersecting with the fourth side in plan view, and
wherein at least one of the fifth side and the sixth side has a portion that is inclined such that a width of the protruding portion of the outer pad is decreased in a direction extending from the opening portion to the side of the semiconductor chip opposite the edge side in plan view.
16. The semiconductor device according to claim 11 ,
wherein the protruding portion of each outer pad has a fourth side closer to the side of the semiconductor chip opposite the edge side, a fifth side intersecting with the fourth side, and a sixth side opposite the fifth side and intersecting with the fourth side in plan view, and
wherein the fifth side and the sixth side are configured such that a width of the protruding portion of the outer pad is not changed in a direction extending from the opening portion to the side of the semiconductor chip opposite the edge side in plan view.
17. The semiconductor device according to claim 11 ,
wherein, at each outer pad in plan view, a width of a coating area of the surface protective film that covers a closest side of the outer pad to the edge side of the semiconductor chip is larger than a width of a coating area of the surface protective film that covers a farthest side of the outer pad from the edge side of the semiconductor chip, and
wherein, in plan view, at a first outer pad closest to a corner of the semiconductor chip among the plurality of outer pads, a width of a coating area of the surface protective film that covers a closest side of the first outer pad to the corner of the semiconductor chip is also larger than the width of the coating area of the surface protective film that covers the farthest side of the first outer pad from the edge side of the semiconductor chip.
18. The semiconductor device according to claim 17 ,
wherein, on each inner pad in plan view, a width of a coating area of the surface protective film that covers a closest side of the inner pad to the edge side of the semiconductor chip is larger than a width of a coating area of the surface protective film that covers a farthest side of the inner pad from the edge side of the semiconductor chip, and
wherein, in plan view, on at a first inner pad closest to a corner of the semiconductor chip among the plurality of inner pads, a width of a coating area of the surface protective film that covers a closest side of the first inner pad to the corner of the semiconductor chip is also larger than the width of the coating area of the surface protective film that covers the farthest side of the first inner pad from the edge side of the semiconductor chip.