IP Library Granted Patent US 10,498,495
Granted Patent B2
US 10,498,495 · App. 15/678,870 · Granted Dec 3, 2019

Packet retransmission

Inventor: Marcos C. Tzannes (Petaluma, CA)
Assignee: TQ DELTA, LLC
H04L1/18H03M13/00H03M13/09H03M13/091H03M13/2707H03M13/6513H04L1/0041H04L1/0045H04L1/0057H04L1/08H04L1/1607H04L1/1809H04L1/1835H04L1/1874H04L12/5601H04L45/00H04L45/72H04L47/10H04L47/2433H04L47/2441H04L47/32H04L49/552H04L69/324H04L2012/5647
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Quick Facts
Patent No.
US 10,498,495
App. No.
15/678,870
Granted
Dec 3, 2019
Kind
B2
Abstract

Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packet handling identifier, a memory used for retransmission of packets can be shared with other transceiver functionality such as, coding, decoding, interleaving, deinterleaving, error correction, and the like.

Claims (31)

1. A method of packet retransmission comprising:

transmitting or receiving, using a transceiver, a plurality of packets,

wherein at least one first packet of the plurality of packets is associated with a first delay requirement,

wherein at least one second packet of the plurality of packets is associated with a second delay requirement, and

wherein the second delay requirement is lower than the first delay requirement;

identifying the at least one second packet of the plurality of packets as a packet that should not be retransmitted even when the packet is received in error; and

transmitting or receiving, using the transceiver, a message comprising acknowledgement (ACK) information of the at least one first packet,

wherein the ACK information is transmitted or received a plurality of times such that the ACK information is transmitted or received in a first DMT symbol and the ACK information is also transmitted or received in a second DMT symbol.

2. The method of claim 1 , further comprising passing the at least one second packet when it is received without error to a higher layer without waiting for receipt of other retransmitted packets.

3. The method of claim 1 , further comprising passing the at least one first packet when it is received without error to a higher layer without waiting for receipt of other retransmitted packets.

4. The method of claim 1 , further comprising waiting for the receipt of other retransmitted packets before passing the at least one first packet a higher layer when they are received without error.

5. A transceiver, including an interconnected processor and memory, operable to:

receive, by the transceiver, a plurality of packets,

wherein at least one first packet of the plurality of packets is associated with a first delay requirement,

wherein at least one second packet of the plurality of packets is associated with a second delay requirement, and

wherein the second delay requirement is lower than the first delay requirement; and

pass the at least one second packet when it is received without error to a higher layer without waiting for receipt of other retransmitted packets; and

further operable to transmit, by the transceiver, a message comprising acknowledgement (ACK) information of the at least one first packet,

wherein the ACK information is transmitted a plurality of times such that the ACK information is transmitted in a first DMT symbol and the ACK information is also transmitted in a second DMT symbol.

6. The transceiver of claim 5 , further operable to pass the at least one first packet when it is received without error to the higher layer without waiting for receipt of other retransmitted packets.

7. The transceiver of claim 5 , further operable to wait for the receipt of other retransmitted packets before passing the at least one first packet to the higher layer when they are received without error.

8. A transceiver, including an interconnected processor and memory, operable to:

receive, by the transceiver, a first packet type and a second packet type,

wherein the first packet type is associated with a first delay requirement,

wherein the second packet type is associated with a second delay requirement,

wherein the second delay requirement is lower than the first delay requirement; and

pass packets of the second packet type that are received without errors to a higher layer without waiting for receipt of other retransmitted packets, and

further operable to transmit, by the transceiver, a message comprising acknowledgement (ACK) information of the at least one first packet,

wherein the ACK information is transmitted a plurality of times such that the ACK information is transmitted in a first DMT symbol and the ACK information is also transmitted in a second DMT symbol.

9. The transceiver of claim 8 , further operable to pass packets of the first packet type that are received without errors to a higher layer without waiting for receipt of other retransmitted packets.

10. The transceiver of claim 8 , further operable to wait for receipt of other retransmitted packets before passing packets of the first packet type that are received without errors to a higher layer when they are received without error.

Assignments (2)
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jan 4, 2021
From: TQ DELTA LLC
To: ALTER DOMUS (US) LLC
Reel/Frame 054898/0850 →
SECURITY INTEREST Recorded Oct 10, 2018
From: TQ DELTA, LLC
To: DLI LENDING AGENT, LLC
Reel/Frame 047212/0551 →
Continuity (7)
Continuation 14742334 · Jun 17, 2015
Continuation 14075194 · Nov 8, 2013
Continuation 12760728 · Apr 15, 2010
Division 12295828
Provisional Application 60792236 · Apr 12, 2006
Provisional Application 60849650 · Oct 5, 2006
Related Publication 20170373971A1 · Dec 28, 2017