IP Library Granted Patent US 10,374,631
Granted Patent B2
US 10,374,631 · App. 15/683,696 · Granted Aug 6, 2019

Look-ahead LDPC decoder

Inventors: Ko-Chung Tseng (Santa Clara, CA); Engling Yeo (San Jose, CA)
Assignee: Goke US Research Laboratory
H03M13/1131H03M13/116H03M13/616H03M13/6525
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Quick Facts
Patent No.
US 10,374,631
App. No.
15/683,696
Granted
Aug 6, 2019
Kind
B2
Abstract

Look-ahead LDPC decoder. In an exemplary embodiment, a method includes generating a message (QA) to a first check node, the QA message is generated from a result (RA) from the first check node, and generating a message (QB) to a second check node, the QB message is generated from the result (RA) and is transmitted to avoid decoder stall. The method also includes receiving a result (R′A) from the first check node, computing a difference (R″A) between the result (R′A) and the result (RA), and receiving a result (R′B) from the second check node. The method also includes computing a bit value P(B) using the difference (R″A) and the result (R′B).

Claims (44)

1. A method performed by a digital data decoder, comprising:

determining that a Read-Before-Write (RBW) hazard may occur;

in response to determining that a RBW hazard may occur:

generating a message (QA) to a first check node, wherein the QA message is generated from a previous result (RA) from the first check node;

generating a message (QB) to a second check node, wherein the QB message is generated from the previous result (RA) and is transmitted before a result (R′A) is received from the first check node;

receiving the result (R′A) from the first check node;

computing a difference (R″A) between the result (R′A) and the result (RA);

receiving a result (R′B) from the second check node; and

computing a bit value P(B) using the difference (R″A) and the result (R′B);

whereby the RBW hazard is avoided as a result of computing QB before receiving the result R′A from the first check node.

2. The method of claim 1 , further comprising storing the previous result (RA).

3. The method of claim 1 , wherein generating the message (QA) comprises generating the message (QA) from (QA=P−RA), wherein P is a previous bit value and RA is the previous result from the first check node.

4. The method of claim 1 , wherein generating (QB) comprises determining (QB) from (QB=P−RB), wherein P is a previous bit value and RB is a previous result value from the second check node.

5. The method of claim 1 , further comprising computing the difference (R″A) from (R′A−RA).

6. The method of claim 1 , wherein computing the bit value P(B) comprises determining P(B) from (P(B)=QB+R′B+R″A).

7. The method of claim 1 , wherein the decoder comprises a low density parity check (LDPC) decoder.

8. The method of claim 7 , wherein the first and second check nodes are adjacent to a bit node and the method further comprises extending the method to mitigate the RBW hazard for additional check nodes that are adjacent to the bit node.

9. The method of claim 7 , wherein determining that a RBW hazard may occur comprises determining the RBW hazard from knowledge of a LDPC code.

10. The method of claim 7 , wherein determining that a RBW hazard may occur comprises determining the RBW hazard on-the-fly during decoding.

11. A digital data decoder, comprising:

means for determining that a Read-Before-Write (RBW) hazard may occur;

means for generating a message (QA) to a first check node, the message (QA) determined from a previous result (RA) from the first check node;

means for generating a message (QB) to a second check node from the previous result (RA) and is transmitted before a result (R′A) is received from the first check node;

means for receiving a result (R′A) from the first check node;

means for computing a difference (R″A) between the result (R′A) and the result (RA) when the RBW hazard may occur;

means for receiving a result (R′B) from the second check node; and

means for computing a bit value P(B) using the difference (R″A) and the result (R′B);

whereby the RBW hazard is avoided as a result of computing QB before receiving the result R′A from the first check node.

12. The data decoder of claim 11 , further comprising a cache memory that stores the result (RA).

13. The digital data decoder of claim 11 , wherein the means for generating the message (QA) comprises means for generating the message (QA) from (QA=P−RA), wherein P is a previous bit value and RA is the previous result from the first check node.

14. The digital data decoder of claim 11 , wherein the means for generating (QB) comprises means for determining (QB) from (QB=P−RB), wherein P is a previous bit value and RB is a previous result value from the second check node.

15. The digital data decoder of claim 11 , further comprising means for computing the difference (R″A) from (R′A−RA).

16. The digital data decoder of claim 11 , wherein the means for computing the bit value P(B) comprises means for computing P(B) from (P(B)=QB+R′B+R″A).

17. The digital data decoder of claim 11 , wherein the apparatus comprises a low density parity check (LDPC) decoder.

18. The digital data decoder of claim 17 , wherein the LDPC decoder detects RBW hazards from at least one of knowledge of a LDPC code and on-the-fly during operation of the LDPC decoder.

19. A method performed by a digital data decoder, comprising:

detecting a read before write (RBW) hazard associated with first and second check nodes;

generating messages (QA) and (QB) to the first and second check nodes, respectively, wherein the (QA) and (QB) messages are generated from a previous result (RA) from the first check node, each message transmitted before a result (R′A) is received from the first check node;

receiving a result (R′A) from the first check node and a result (R′B) from the second check node; and

computing a new bit node value based on the result (R′A) and the result (R′B);

whereby the RBW hazard is avoided as a result of computing QB before receiving the result R′A from the first check node.

20. The method of claim 19 , further comprising:

computing a difference (R″A) between the result (R′A) and the result (RA) when the RBW hazard may occur;

wherein the computing of the new bit node value comprises calculating the new bit node value from (P(B)=QB+R′B+R″A).

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2024
From: CHIGMA TECHNOLOGY
To: CHENGDU XINSHENG INTEGRATED CIRCUIT CO., LTD.
Reel/Frame 068622/0721 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2023
From: GOKE US RESEARCH LABORATORY
To: CHIGMA TECHNOLOGY
Reel/Frame 063403/0349 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: TSENG, KO-CHUNG; YEO, ENGLING
To: GOKE US RESEARCH LABORATORY
Reel/Frame 043362/0019 →
Continuity (1)
Related Publication 20190068223A1 · Feb 28, 2019