IP Library Granted Patent US 10,886,244
Granted Patent B2
US 10,886,244 · App. 15/684,054 · Granted Jan 5, 2021

Collars for under-bump metal structures and associated systems and methods

Inventors: Giorgio Mariottini (Boise, ID); Sameer Vadhavkar (Boise, ID); Wayne Huang (Boise, ID); Anilkumar Chandolu (Boise, ID); Mark Bossier (Meridian, ID)
Assignee: Micron Technology, Inc.
H01L24/05H01L21/481H01L24/03H01L24/11H01L24/13H01L2224/0219H01L2224/02135H01L2224/02166H01L2224/03013H01L2224/0345H01L2224/0346H01L2224/0348H01L2224/0361H01L2224/03472H01L2224/03906H01L2224/03912H01L2224/0401H01L2224/05007H01L2224/0508H01L2224/05009H01L2224/0569H01L2224/05082H01L2224/05144H01L2224/05147H01L2224/05155H01L2224/05166H01L2224/05181H01L2224/05184H01L2224/05547H01L2224/05553H01L2224/05555H01L2224/05565H01L2224/05566H01L2224/05568H01L2224/05573H01L2224/05686H01L2224/05687H01L2224/10126H01L2224/10145H01L2224/1146H01L2224/11472H01L2224/11906H01L2224/13018H01L2224/13023H01L2224/13026H01L2224/13083H01L2224/13109H01L2224/13111H01L2224/13147H01L2224/13155H01L2224/94H01L2924/014H01L2924/07025H01L2924/3651
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Quick Facts
Patent No.
US 10,886,244
App. No.
15/684,054
Filed
Aug 23, 2017
Granted
Jan 5, 2021
Kind
B2
Examiner
TRAN, DZUNG
Art Unit
2829
USPC
257/737
Abstract

The present technology is directed to manufacturing collars for under-bump metal (UBM) structures for die-to-die and/or package-to-package interconnects and associated systems. A semiconductor die includes a semiconductor material having solid-state components and an interconnect extending at least partially through the semiconductor material. An under-bump metal (UBM) structure is formed over the semiconductor material and is electrically coupled to corresponding interconnects. A collar surrounds at least a portion of the side surface of the UBM structure, and a solder material is disposed over the top surface of the UBM structure.

Claims (26)

1. A method comprising:

forming an under-bump metal (UBM) structure, wherein forming the UBM structure comprises: forming a mask on a seed structure, wherein the mask has an opening that exposes an area of the seed structure that is electrically coupled to an interconnect that extends at least partially through a semiconductor substrate; plating a first material onto the exposed area of the seed structure; and depositing a second material into the opening over the first material;

forming a collar from an anti-wetting material, wherein the collar surrounds at least a portion of a sidewall of the UBM structure without covering a top surface of the UBM structure, wherein the collar surrounds a portion, but not all, of the first conductive material and a portion of the second conductive material, and wherein the collar does not contact a semiconductor material of the semiconductor device; and

disposing a solder material on the top surface of the UBM structure, wherein the solder material does not readily wet to the anti-wetting material when the solder material is in liquid phase.

2. The method of claim 1 , further comprising removing at least a portion of the mask thereby exposing portions of the seed structure.

3. The method of claim 2 , further comprising removing the exposed portions of the seed structure.

4. The method of claim 1 wherein the first and second materials are conductive, and wherein the anti-wetting material comprises at least one of: a nitride, an oxide, or polyimide.

5. The method of claim 1 wherein the opening in the mask has an upper portion and a lower portion, wherein the upper portion is wider than the lower portion.

6. The method of claim 5 , further comprising:

plating the first material into the lower portion of the opening;

depositing the second material into the lower portion of the opening over the first material thereby forming the UBM structure in the lower portion;

removing a portion of the mask to define a collar opening surrounding the UBM structure; and

forming the collar comprising the anti-wetting material in the collar opening.

7. The method of claim 6 , wherein forming the collar comprising the anti-wetting material in the collar opening comprises:

depositing a blanket layer of the anti-wetting material over the mask and the opening; and

etching to remove a portion of the anti-wetting material while retaining the anti-wetting material in the collar opening.

8. The method of claim 1 , wherein the opening is a first opening, and further comprising:

forming the collar over the exposed area of the seed structure, the collar defining a second opening.

9. The method of claim 8 , further comprising forming the UBM structure by depositing the first material into the second opening and depositing the second material over the first material.

10. The method of claim 8 , further comprising:

depositing the solder material over the collar and the second material;

removing at least a portion of the mask thereby exposing a portion of the seed structure; and

removing the exposed portion of the seed structure.

11. The method of claim 8 wherein forming the collar comprises:

depositing a blanket layer of the anti-wetting material over the mask and the first opening, the anti-wetting material coating interior side surfaces of the opening; and

performing an anisotropic etch on the anti-wetting material to remove anti-wetting material from a bottom surface of the first opening thereby forming the second opening.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2017
From: MARIOTTINI, GIORGIO; VADHAVKAR, SAMEER; HUANG, WAYNE; CHANDOLU, ANILKUMAR; BOSSLER, MARK
To: MICRON TECHNOLOGY, INC.
Reel/Frame 043368/0946 →
Continuity (2)
Division 14853807 · Sep 14, 2015
Related Publication 20170352633A1 · Dec 7, 2017
Cited By (1)
US 12,419,063