IP Library Granted Patent US 10,505,005
Granted Patent B2
US 10,505,005 · App. 15/684,707 · Granted Dec 10, 2019

Metal contacts to group IV semiconductors by inserting interfacial atomic monolayers

Inventors: Walter A. Harrison (Palo Alto, CA); Paul A. Clifton (Palo Alto, CA); Andreas Goebel (Palo Alto, CA); R. Stockton Gaines (Santa Monica, CA)
Assignee: ACORN SEMI, LLC
H01L29/47H01L21/283H01L21/28512H01L21/28518H01L21/324H01L29/045H01L29/161H01L29/456
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Quick Facts
Patent No.
US 10,505,005
App. No.
15/684,707
Granted
Dec 10, 2019
Kind
B2
Abstract

Techniques for reducing the specific contact resistance of metal—semiconductor (group IV) junctions by interposing a monolayer of group V or group III atoms at the interface between the metal and the semiconductor, or interposing a bi-layer made of one monolayer of each, or interposing multiple such bi-layers. The resulting low specific resistance metal—group IV semiconductor junctions find application as a low resistance electrode in semiconductor devices including electronic devices (e.g., transistors, diodes, etc.) and optoelectronic devices (e.g., lasers, solar cells, photodetectors, etc.) and/or as a metal source and/or drain region (or a portion thereof) in a field effect transistor (FET). The monolayers of group III and group V atoms are predominantly ordered layers of atoms formed on the surface of the group IV semiconductor and chemically bonded to the surface atoms of the group IV semiconductor.

Claims (10)

1. A method of forming a metal semiconductor contact with a monolayer of one of group V or group III atoms at the metal-semiconductor interface, wherein the monolayer is an ordered monolayer formed by segregation of group V or group III atoms, as applicable, out of a layer of material in contact with a surface of the semiconductor with the group V or group III atoms, as applicable, bonded in epitaxial coordination with atoms of a top layer of the semiconductor.

2. The method of claim 1 , wherein the group V or group III atoms of the monolayer are introduced into the layer of material by ion implantation.

3. The method of claim 1 , wherein the layer of material is deposited on the semiconductor surface by one of chemical vapor deposition (CVD) or physical vapor deposition (PVD).

4. The method of claim 3 , wherein the group V or group III atoms of the monolayer are introduced into the layer of material by including said atoms as a dopant in the CVD or PVD deposition process or by ion implantation.

5. A method of forming a metal semiconductor contact with a monolayer of one of group V or group III atoms at a metal-semiconductor interface, comprising forming the monolayer by segregation of group V or group III atoms, as applicable, out of a layer of material in contact with a surface of the semiconductor, wherein the layer of material is deposited as a thin film of doped silicon oxide containing a high concentration of a group V element.

6. A method of forming a metal semiconductor contact with a monolayer of one of group V or group III atoms at a metal-semiconductor interface, comprising forming the monolayer by segregation of group V or group III atoms, as applicable, out of a layer of material in contact with a surface of the semiconductor, wherein the layer of material is deposited as a thin film of doped silicon oxide containing a high concentration of a group III element.

7. A method of forming a metal semiconductor contact with a monolayer of one of group V or group III atoms at a metal-semiconductor interface, comprising forming the monolayer by segregation of group V or group III atoms, as applicable, out of a layer of material in contact with a surface of the semiconductor, wherein the group V or group III atoms of the monolayer are introduced into the layer of material, and thereafter, the contact is annealed at a sufficiently high temperature to cause the group V or group III atoms to segregate and form an ordered monolayer of group V or group III atoms at the interface, with the group V or group III atoms bonded in epitaxial coordination with a top layer of atoms of the semiconductor.

8. The method of claim 7 , wherein the layer of material is a doped silicon oxide or silicon nitride layer, and wherein after annealing has caused segregation of some group V or group III element to the semiconductor-silicon oxide or semiconductor-silicon nitride interface, as applicable, the silicon oxide or silicon nitride is subsequently removed by selective wet chemical etching, leaving behind a coordinated monolayer of the group V or group III atoms at the semiconductor surface, and a metal is deposited to form a metal contact to the group V or group III atoms.

9. The method of claim 7 , wherein the layer of material is a metal silicide, and wherein, after annealing has caused segregation of the group V or group III atoms to form an interfacial ordered monolayer, the metal silicide is removed.

10. The method of claim 7 , wherein the layer of material is a metal silicide, and wherein, after annealing has caused segregation of the group V or group III atoms to form an interfacial ordered monolayer, the metal silicide is retained in place to function as a metal contact to the group V or group III atoms.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2019
From: ACORN TECHNOLOGIES, INC.
To: ACORN SEMI, LLC
Reel/Frame 049602/0324 →
SECURITY INTEREST Recorded May 30, 2019
From: ACORN SEMI LLC
To: THE PETER NORTON LIVING TRUST DATED APRIL 28, 1989,
Reel/Frame 049320/0634 →
Continuity (4)
Continuation 15146562 · May 4, 2016
Continuation 14360473
Provisional Application 61563478 · Nov 23, 2011
Related Publication 20170373164A1 · Dec 28, 2017