Patent Assignment
Reel/Frame 049320/0634
Security Interest
Recorded: 2019-05-30
Pages: 17
Assignor
ACORN SEMI LLC
Executed: 2019-05-02
Assignee
THE PETER NORTON LIVING TRUST DATED APRIL 28, 1989,
7 TIMES SQUARE, O'MELVENY & MYERS C/O T. BOGGS / V. FERRITO, NEW YORK, NEW YORK, 10036
Covered Properties
(56)
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Metal Contacts to Group Iv Semiconductors by Inserting Interfacial Atomic Monolayers
Tensile Strained Semiconductor Photon Emission and Detection Devices and Integrated Photonics System
Strained Semiconductor Using Elastic Edge Relaxation of a Stressor Combined with Buried Insulating Layer
Mis Contact Structure with Metal Oxide Conductor
Soi Wafers and Devices with Buried Stressor
Application:
15/655,710 →
Publication:
US 2017/0323973
Soi Wafers and Devices with Buried Stressor
Nanowire Transistor with Source and Drain Induced by Electrical Contacts with Negative Schottky Barrier Height
Strained Semiconductor-on-Insulator by Deformation of Buried Insulator Induced by Buried Stressor
Application:
15/877,273 →
Publication:
US 2018/0212056
Electrostatically Operated Tunneling Transistor
Patent:
6,198,113 →
Application:
09/296,858 →
Electrostatically Operated Tunneling Transistor
Patent:
7,615,402 →
Application:
09/612,607 →
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Method for Depinning the Fermi Level of a Semiconductor at an Electrical Junction and Devices Incorporating Such Junctions
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Insulated Gate Field Effect Transistor Having Passivated Schottky Barriers to the Channel
Transistor with Workfunction-Induced Charge Layer
Patent:
6,891,234 →
Application:
10/832,576 →
Insulated Gate Field-Effect Transistor Having Iii-Vi Source/Drain Layer(S)
Process for Fabricating a Self-Aligned Deposited Source/Drain Insulated Gate Field-Effect Transistor
Process for Fabricating a Self-Aligned Deposited Source/Drain Insulated Gate Field-Effect Transistor
Method for Making Semiconductor Insulated-Gate Field-Effect Transistor Having Multilayer Deposited Metal Source(S) and/or Drain(S)
Method for Making Semiconductor Insulated-Gate Field-Effect Transistor Having Multilayer Deposited Metal Source(S) and/or Drain(S)
Channel Strain Induced by Strained Metal in Fet Source or Drain
Field Effect Transistor Source or Drain with a Multi-Facet Surface
Metal Contacts to Group Iv Semiconductors by Inserting Interfacial Atomic Monolayers
Metal Contacts to Group Iv Semiconductors by Inserting Interfacial Atomic Monolayers
Metal Contacts to Group Iv Semiconductors by Inserting Interfacial Atomic Monolayers
Tensile Strained Semiconductor Photon Emission and Detection Devices and Integrated Photonics System
Tensile Strained Semiconductor Photon Emission and Detection Devices and Integrated Photonics System
Tensile Strained Semiconductor Photon Emission and Detection Devices and Integrated Photonics System
Tensile Strained Semiconductor Photon Emission and Detection Devices and Integrated Photonics System
Tensile Strained Semiconductor Photon Emission and Detection Devices and Integrated Photonics System
Strained Semiconductor Using Elastic Edge Relaxation of a Stressor Combined with Buried Insulating Layer
Strained Semiconductor Using Elastic Edge Relaxation of a Stressor Combined with Buried Insulating Layer
Strained Semiconductor Using Elastic Edge Relaxation of a Stressor Combined with Buried Insulating Layer
Strained Semiconductor Using Elastic Edge Relaxation of a Stressor Combined with Buried Insulating Layer
Mis Contact Structure with Metal Oxide Conductor
Mis Contact Structure with Metal Oxide Conductor
Patent:
9,620,611 →
Application:
15/186,378 →
Nanowire Transistor with Source and Drain Induced by Electrical Contacts with Negative Schottky Barrier Height
Strained-Enhanced Silicon Photon-to-Electron Conversion Devices
Strain-Enhanced Silicon Photon-to-Electron Conversion Devices
Related Assignments
(18)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Jan 24, 2000
From: GRUPP, DANIEL E.
To: XISTOR TECHNOLOGY DEVELOPMENT CORPORATION
Reel/Frame 010564/0113 →
Assignment of Assignor's Interest
Aug 12, 2002
From: GRUPP, DANIEL E.; CONNELLY, DANIEL J.
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 013195/0068 →
Merger
Jan 24, 2006
From: XISTOR ACQUISITION CORPORATION
To: XISTOR TECHNOLOGY DEVELOPMENT, INC.
Reel/Frame 017480/0963 →
Merger
Jan 25, 2006
From: XISTOR TECHNOLOGY DEVELOPMENT CORPORATION
To: XISTOR ACQUISITION CORPORATION
Reel/Frame 017492/0200 →
Assignment of Assignor's Interest
Jan 8, 2009
From: GRUPP, DANIEL E.; CONNELLY, DANIEL J.
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 022077/0447 →
Assignment of Assignor's Interest
Jan 27, 2017
From: GRUPP, DANIEL E.; CONNELLY, DANIEL J.
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 041111/0926 →
Assignment of Assignor's Interest
Mar 6, 2018
From: GOEBEL, ANDREAS
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 045124/0566 →
Assignment of Assignor's Interest
Mar 6, 2018
From: CLIFTON, PAUL A.
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 045124/0502 →
Assignment of Assignor's Interest
Oct 30, 2018
From: CLIFTON, PAUL A.; GOEBEL, ANDREAS
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 047361/0798 →
Assignment of Assignor's Interest
Nov 28, 2018
From: HARRISON, WALTER A.
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 047611/0961 →
Assignment of Assignor's Interest
Nov 28, 2018
From: CLIFTON, PAUL A.
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 047611/0951 →
Assignment of Assignor's Interest
Nov 28, 2018
From: GOEBEL, ANDREAS
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 047611/0920 →
Assignment of Assignor's Interest
Mar 15, 2019
From: CLIFTON, PAUL A.; GOEBEL, ANDREAS
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 048610/0206 →
Assignment of Assignor's Interest
Jun 26, 2019
From: ACORN TECHNOLOGIES, INC.
To: ACORN SEMI, LLC
Reel/Frame 049602/0324 →
Assignment of Assignor's Interest
Apr 18, 2024
From: CLIFTON, PAUL A.; GAINES, R. STOCTON
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 067150/0051 →
Assignment of Assignor's Interest
Dec 26, 2024
From: ACORN SEMI, LLC
To: OAK IP, LLC
Reel/Frame 069681/0837 →
Release of Security Interest
Dec 26, 2024
From: THE PETER NORTON LIVING TRUST
To: ACORN SEMI, LLC
Reel/Frame 069792/0173 →
Release of Security Interest
Dec 26, 2024
From: THE PETER NORTON LIVING TRUST
To: ACORN TECHNOLOGIES, INC.
Reel/Frame 069792/0208 →