Semiconductor device and method of manufacturing the same

1. A semiconductor device, comprising:

a substrate including a first surface and a second surface opposite to the first surface;

a package over the substrate;

a plurality of first conductors over the substrate;

a plurality of second conductors over the substrate, wherein the plurality of first conductors and the plurality of the second conductors are substantially at a same tier, and a width of a second conductor of the plurality of second conductors is larger than a width of a first conductor of the plurality of first conductors;

a plurality of first bonding pads on the substrate and configured to receive and electrically connect to the plurality of first conductors, respectively;

a plurality of second bonding pads on the substrate and configured to receive and electrically connect to the plurality of second conductors, respectively; and

a passivation layer over the substrate, wherein the passivation layer includes a plurality of first recesses exposing the plurality of first bonding pads respectively, and a plurality of second recesses exposing the plurality of second bonding pads respectively, and a width of the first recess is wider than a width of the second recess, wherein the first conductor is apart from an edge of the respective first recess, and the second conductor is in contact with an edge of the respective second recess.

2. The semiconductor device of claim 1 , wherein a volume of a second conductor of the plurality of second conductors is substantially equal to a volume of a first conductor of the plurality of first conductors.

3. The semiconductor device of claim 1 , wherein a volume of a second conductor of the plurality of second conductors is larger than a volume of a first conductor of the plurality of first conductors.

4. The semiconductor device of claim 1 , wherein a width of a first bonding pad of the plurality of first bonding pads is wider than a width of a second bonding pad of the plurality of second bonding pads.

5. The semiconductor device of claim 1 , wherein the package, the plurality of first conductors and the plurality of second conductors are over the first surface of the substrate, and the plurality of first conductors and the plurality of second conductors are between the package and the first surface of the substrate.

6. The semiconductor device of claim 5 , wherein the package comprises:

an interposer;

at least one first semiconductor die over and electrically connected to the interposer;

at least one second semiconductor die over and electrically connected to the interposer, and the at least one second semiconductor die being adjacent to the at least one first semiconductor die;

a first molding layer surrounding sidewalls of the at least one first semiconductor die; and

a second molding layer over the interposer and surrounding sidewalls of the at least one second semiconductor die and sidewalls of the first molding layer.

7. The semiconductor device of claim 6 , wherein the plurality of first conductors are substantially aligned to a boundary between the at least one first semiconductor die and the at least one second semiconductor die, and substantially aligned to a boundary between the at least one second semiconductor die and an edge of the interposer.

8. The semiconductor device of claim 1 , wherein the package is over the first surface of the substrate, and the plurality of first conductors and the plurality of second conductors are over the second surface of the substrate.

9. The semiconductor device of claim 8 , wherein the plurality of second conductors are under the package, and the plurality of first conductors are proximal to an edge of the substrate.

10. The semiconductor device of claim 1 , further comprising a plurality of third conductors between the plurality of first conductors and the plurality of second conductors, and a width of the third conductor is between the width of the first conductor and the width of the second conductor.

11. A method for manufacturing a semiconductor device, comprising:

receiving a substrate including a first bonding pad and a second bonding pad;

forming a first conductor and a second conductor over the substrate, wherein a height of the second conductor is larger than a height of the first conductor, and the forming the first conductor and the second conductor over the substrate comprises:

forming a first conductive material over the first bonding pad and the second bonding pad to form a plurality of conductors having a same height;

forming a patterned mask layer including a recess exposing one of the conductors;

forming a second conductive material in the recess; and

performing a reflow operation to form the first conductor and the second conductor; and

bonding the substrate to an electronic component through the first conductor and the second conductor.

12. A semiconductor device, comprising:

a substrate including a first surface and a second surface opposite to the first surface;

an interposer;

at least one first semiconductor die over and electrically connected to the interposer; and

at least one second semiconductor die over and electrically connected to the interposer, and the at least one second semiconductor die being adjacent to the at least one first semiconductor die;

a plurality of first conductors over the substrate; and

a plurality of second conductors over the substrate, wherein a width of a second conductor of the plurality of second conductors is larger than a width of a first conductor of the plurality of first conductors,

wherein the plurality of first conductors are substantially aligned to a boundary between the at least one first semiconductor die and the at least one second semiconductor die.

13. The semiconductor device of claim 12 , wherein the plurality of first conductors are further substantially aligned to a boundary between the at least one second semiconductor die and an edge of the interposer.

14. The semiconductor device of claim 12 , wherein the plurality of first conductors and the plurality of the second conductors are substantially at a same tier.

15. The semiconductor device of claim 12 , further comprising:

a plurality of first bonding pads on the substrate and configured to receive and electrically connect to the plurality of first conductors, respectively; and

a plurality of second bonding pads on the substrate and configured to receive and electrically connect to the plurality of second conductors, respectively.

16. The semiconductor device of claim 12 , further comprising a passivation layer between the substrate and the interposer, and adjacent to the first conductors and the second conductors.

17. The semiconductor device of claim 16 , wherein the first conductors are apart from the passivation layer, and the second conductors are in contact with the passivation layer.

18. The semiconductor device of claim 12 , further comprising:

a first molding layer surrounding sidewalls of the at least one first semiconductor die; and

a second molding layer over the interposer and surrounding sidewalls of the at least one second semiconductor die and sidewalls of the first molding layer.

19. The semiconductor device of claim 12 , wherein a volume of a second conductor of the plurality of second conductors is substantially equal to a volume of a first conductor of the plurality of first conductors.

20. The semiconductor device of claim 12 , further comprising a plurality of third conductors between the plurality of first conductors and the plurality of second conductors, and a width of the third conductor is between the width of the first conductor and the width of the second conductor.