IP Library Granted Patent US 10,163,498
Granted Patent B1
US 10,163,498 · App. 15/689,989 · Granted Dec 25, 2018

Reflow protection

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Quick Facts
Patent No.
US 10,163,498
App. No.
15/689,989
Granted
Dec 25, 2018
Kind
B1
Abstract

Devices and techniques to reduce corruption of preloaded data during assembly are disclosed herein. A memory device can perform operations to store received data, including preloaded data, up to a threshold amount on a memory array in a reflow-protection mode, and to transition from the reflow-protection mode to a normal-operation mode after the initial data exceeds the threshold amount.

Claims (44)

1. A memory device configured to reduce corruption of preloaded data during assembly, the memory device comprising:

a memory array having groups of multiple blocks of memory cells; and

a memory controller operably coupled to the memory array, the memory controller to perform operations comprising:

store received data, including preloaded data, up to a threshold amount on the memory array in a reflow-protection mode; and

transition from the reflow-protection mode to a normal-operation mode after the received data exceeds the threshold amount.

2. The memory device of claim 1 , wherein the memory controller is configured to write the received data in the reflow-protection mode on the memory array as single-level cells (SLC), and to write received data in the normal-operation mode as multi-level cells (MLC).

3. The memory device of claim 2 , wherein, after the received data exceeds the threshold amount, the memory controller is configured to write the received data stored in the reflow-protection mode as SLC to the memory array as MLC.

4. The memory device of claim 1 , wherein the memory controller is configured to perform background operations in the normal-operation mode, and to suspend background operations in the reflow-protection mode, wherein background operations include data migration.

5. The memory device of claim 1 , wherein the reflow-protection mode has a greater threshold temperature margin than the normal-operation mode, wherein the threshold amount is greater than the amount of preloaded data including a kernel and pre-loaded software for an electronic device configured to include the memory device, and wherein the memory controller is configured to store the preloaded data on the memory array in the reflow-protection mode as SLC to reduce corruption of the preloaded data during assembly of the electronic device including the memory device.

6. The memory device of claim 5 , wherein, because the threshold amount is greater than the amount of preloaded data, the memory device is configured to store received data in the reflow-protection mode for a short time after assembly of the electronic device, then transition after assembly of the electronic device to the normal-operation mode after the received data exceeds the threshold amount, without receiving a separate indication from a host device of completed assembly.

7. The memory device of claim 5 , wherein the multi-level cells (MLC) include two-level cells, triple-level cells (TLC), or quad-level cells (QLC), and wherein the memory array includes a three-dimensional (3D) NAND memory array.

8. The memory device of claim 1 , wherein the memory controller is configured to receive the threshold amount from a host device prior to receiving the preloaded data.

9. The memory device of claim 1 , wherein the threshold amount is 5 gigabytes (GB) of data.

10. The memory device of claim 1 , wherein the memory controller is configured to transition from the reflow-protection mode to the normal-operation mode without receiving a separate verification of preloaded data.

11. The memory device of claim 1 , wherein the memory controller is configured to transition from the reflow-protection mode to the normal-operation mode without receiving a separate indication of completed assembly.

12. A method for managing a memory device to reduce corruption of preloaded data during assembly, the method comprising a number of operations performed by a memory controller of a memory array, the memory array having groups of multiple blocks of memory cells, the operations comprising:

storing received data, including preloaded data, up to a threshold amount on a memory array memory array in a reflow-protection mode;

transitioning from the reflow-protection mode to a normal-operation mode after the received data exceeds the threshold amount.

13. The method of claim 12 , the operations comprising:

writing received data in the reflow-protection mode on the memory array as single-level cells (SLC); and

writing received data in the normal-operation mode on the memory array as multi-level cells (MLC),

wherein preloaded data includes a kernel and pre-loaded software for an electronic device configured to include the memory device, and

wherein writing received data in the reflow-protection mode as SLC includes to reduce corruption of the preloaded data during assembly of the electronic device including the memory device.

14. The method of claim 13 , wherein transitioning from the reflow-protection mode to the normal-operation mode includes writing the received data stored in the reflow-protection mode as SLC to the memory array as MLC.

15. The method of claim 12 , the operations comprising:

performing background operations on the memory device in the normal-operation mode; and

suspending background operations in the reflow-protection mode,

wherein background operations include data migration.

16. The method of claim 12 , the operations comprising:

receiving the threshold amount from a host device prior to receiving the preloaded data.

17. The method of claim 12 , wherein transitioning from the reflow-protection mode to the normal-operation mode includes without receiving a separate verification of preloaded data, or without receiving a separate indication of completed assembly.

18. A non-transitory device readable storage medium that provides instructions that, when executed by a memory controller of a memory device, cause the memory controller to perform operations to reduce corruption of preloaded data during assembly, the operations comprising:

store received data, including preloaded data, up to a threshold amount on a memory array memory array in a reflow-protection mode;

transition from the reflow-protection mode to a normal-operation mode after the received data exceeds the threshold amount.

19. The non-transitory device readable storage medium of claim 18 , the operations comprising:

write received data in the reflow-protection mode on the memory array as single-level cells (SLC) to reduce corruption of the preloaded data during assembly of an electronic device including the memory device, wherein the preloaded data includes a kernel and pre-loaded software for the electronic device; and

write received data in the normal-operation mode on the memory array as multi-level cells (MLC).

20. The non-transitory device readable storage medium of claim 18 , wherein the operation to transition from the reflow-protection mode to the normal-operation mode includes to write the received data stored in the reflow-protection mode as SLC to the memory array as MLC.

21. The non-transitory device readable storage medium of claim 18 , the operations comprising:

perform background operations on the memory device in the normal-operation mode; and

suspend background operations in the reflow-protection mode, wherein background operations include data migration.

22. The non-transitory device readable storage medium of claim 18 , the operations comprising:

receive the threshold amount from a host device prior to receiving the preloaded data.

23. The non-transitory device readable storage medium of claim 18 , wherein the operation to transition from the reflow-protection mode to the normal-operation mode includes without receiving a separate verification of preloaded data, or without receiving a separate indication of completed assembly.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2018
From: JEAN, SEBASTIEN ANDRE; LUO, TING
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046503/0385 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →