Memory constrained translation table management
Devices and techniques for memory constrained translation table management are disclosed herein. A level of a translation table is logically segmented into multiple segments. Here, a bottom level of the translation table includes a logical to physical address pairing for a portion of a storage device and other levels of the translation table include references within the translation table. The multiple segments are written to the storage device. A first segment of the multiple segments is loaded to byte-addressable memory. A request for an address translation is received and determined to be for an address referred to by a second segment of the multiple segments. The first segment is then replaced with the second segment in the byte-addressable memory and the request is fulfilled using the second segment to locate a lower level of the translation table that includes the address translation.
1. A device for memory translation table management, the device comprising:
a byte-addressable memory;
a storage device; and
a controller to:
logically segment a level of a translation table into multiple segments, wherein a bottom level of the translation table includes a logical to physical address pairing for a portion of the storage device, and other levels of the translation table include references within the translation table;
write the multiple segments to the storage device; load a first segment of the multiple segments to the byte-addressable memory;
receive a request for an address translation;
determine that the request is for an address referred to by a second segment of the multiple segments;
replace the first segment with the second segment in the byte-addressable memory in response to determination that the request is for an address referred to by the second segment; and
fulfill the request using the second segment, in the byte-addressable memory, to locate a lower level of the translation table that includes the address translation.
2. The device of claim 1 , wherein, to write the multiple segments to the storage device, he controller implements a constraint on locations of the storage device to which the multiple segments may be written.
3. The device of claim 2 , wherein the constraint requires the locations of the storage device to be contiguous.
4. The device of claim 2 , wherein the constraint corresponds to a physical attribute of the storage device.
5. The device of claim 4 , wherein the physical attribute is a fixed page, sub-block, block, or die that repeats within the storage device, wherein the storage device is a NAND array.
6. The device of claim 5 , wherein the fixed page is a first page in a block, the fixed block is a first block in a die, and the fixed die is a first die in the NAND array.
7. The device of claim 5 , wherein, to replace the first segment with the second segment, the controller searches the fixed page, block, or die for the second segment.
8. The device of claim 7 , wherein, to search for the second segment, the controller inspects each repetition of the fixed page, block, or die until a translation table marker is found.
9. The device of claim 1 , wherein, to load the first segment of the multiple segments to the byte-addressable memory, the controller adds a pointer to the second segment to the byte-addressable memory.
10. The device of claim 1 , wherein the device is a three-dimensional NAND Flash device.
11. A method for memory translation table management, the method comprising:
logically segmenting a level of a translation table into multiple segments, wherein a bottom level of the translation table includes a logical to physical address pairing for a portion of a storage device, and other levels of the translation table include references within the translation table;
writing the multiple segments to the storage device;
loading a first segment of the multiple segments to byte-addressable memory;
receiving a request for an address translation;
determining that the request is for an address referred to by a second segment of the multiple segments;
replacing the first segment with the second segment in the byte-addressable memory in response to determination that the request is for an address referred to by the second segment; and
fulfilling the request using the second segment, in the byte-addressable memory, to locate a lower level of the translation table that includes the address translation.
12. The method of claim 11 , wherein writing the multiple segments to the storage device includes implementing a constraint on locations of the storage device to which the multiple segments may he written.
13. The method of claim 12 , wherein the constraint requires the locations of the storage device to be contiguous.
14. The method of claim 12 , wherein the constraint corresponds to a physical attribute of the storage device.
15. The method of claim 14 , wherein the physical attribute is a fixed page, sub-block, block, or die that repeats within the storage device, wherein the storage device is a NAND array.
16. The method of claim 15 , wherein the fixed page is a first page in a block, the fixed block is a first block in a die, and the fixed die is a first die in the NAND array.
17. The method of claim 15 , wherein replacing the first segment with the second segment includes searching the fixed page, block, or die for the second segment.
18. The method of claim 17 , wherein searching for the second segment includes inspecting each repetition of the fixed page, block, or die until a translation table marker is found.
19. The method of claim 11 , wherein loading the first segment of the multiple segments to the byte-addressable memory includes adding a pointer to the second segment to the byte-addressable memory.
20. The method of claim 11 , wherein the storage device is a three-dimensional NAND Flash device, and wherein the operations are performed by a controller packaged in the storage device.
21. At least one non-transitory machine readable medium including instructions that, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:
logically segmenting a level of a translation table into multiple segments, wherein a bottom level of the translation table includes a logical to physical address pairing for a portion of a storage device, and other levels of the translation table include references within the translation table;
writing the multiple segments to the storage device;
loading a first segment of the multiple segments to byte-addressable memory;
receiving a request for an address translation;
determining that the request is for an address referred to by a second segment of the multiple segments;
replacing the first segment with the second segment in the byte-addressable memory in response to determination that the request is for an address referred to by the second segment; and
fulfilling the request using the second segment, in the byte-addressable memory, to locate a lower level of the translation table that includes the address translation.
22. The machine readable medium of claim 21 , wherein writing the multiple segments to the storage device includes implementing a constraint on locations of the storage device to which the multiple segments may be written.
23. The machine readable medium of claim 22 , wherein the constraint requires the locations of the storage device to be contiguous.
24. The machine readable medium of claim 22 , wherein the constraint corresponds to a physical attribute of the storage device.
25. The machine readable medium of claim 24 , wherein the physical attribute is a fixed page, sub-block, block, or die that repeats within the storage device, wherein the storage device is a NAND array.
26. The machine readable medium of claim 25 , wherein the fixed page is a first page in a block, the fixed block is a first block in a die, and the fixed die is a first die in the NAND array.
27. The machine readable medium of claim 25 , wherein replacing the first segment with the second segment includes searching the fixed page, block, or die for the second segment.
28. The machine readable medium of claim 27 , wherein searching for the second segment includes inspecting each repetition of the fixed page, block, or die until a translation table marker is found.
29. The machine readable medium of claim 21 , wherein loading the first segment of the multiple segments to the byte-addressable memory includes adding a pointer to the second segment to the byte-addressable memory.
30. The machine readable medium of claim 21 , wherein the storage device is a three-dimensional NAND Flash device, and wherein the operations are performed by a controller packaged in the storage device.