IP Library Granted Patent US 10,141,040
Granted Patent B2
US 10,141,040 · App. 15/693,032 · Granted Nov 27, 2018

Cell performance recovery using cycling techniques

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Quick Facts
Patent No.
US 10,141,040
App. No.
15/693,032
Granted
Nov 27, 2018
Kind
B2
Abstract

Methods, systems, and devices for memory array operation are described. A series of pulses may be applied to a fatigued memory cell to improve performance of memory cell. For example, a ferroelectric memory cell may enter a fatigue state after a number of access operations are performed at an access rate. After the number of access operations have been performed at the access rate, a fatigue state of the ferroelectric memory cell may be identified and the series of pulses may be applied to the ferroelectric capacitor at a different (e.g., higher) rate. For instance, a delay between pulses of the series of pulses may be shorter than the delay between access operations of the ferroelectric memory cell.

Claims (55)

1. A method, comprising:

applying a plurality of access pulses to a memory cell in an operation state;

determining a sampling frequency based at least in part on a delay between at least two access pulses of the plurality of access pulses;

monitoring a remnant polarization of the memory cell based at least in part on the sampling frequency, wherein the remnant polarization corresponds to an amount of charge capable of being stored by the memory cell; and

determining a first peak magnitude in the remnant polarization of the memory cell as a function of a number of the applied plurality of access pulses based at least in part on monitoring the remnant polarization of the memory cell.

2. The method of claim 1 , wherein determining the first peak magnitude in the remnant polarization of the memory cell comprises:

detecting a decrease in the remnant polarization of the memory cell compared to a previous remnant polarization of the memory cell.

3. The method of claim 2 , further comprising:

determining a fatigue state of the memory cell based at least in part on the decrease in the remnant polarization of the memory cell.

4. The method of claim 1 , further comprising:

determining that the memory cell has entered a fatigue state based at least in part on the first peak magnitude in the remnant polarization;

configuring a plurality of pulses based at least in part on determining that the memory cell has entered the fatigue state;

applying the configured plurality of pulses to the memory cell in a recovery state;

monitoring the remnant polarization of the memory cell based at least in part on applying the plurality of pulses; and

terminating the plurality of pulses based at least in part on a second peak magnitude in the remnant polarization during monitoring of the remnant polarization of the memory cell.

5. The method of claim 4 , wherein configuring the plurality of pulses comprises:

generating a series of single polarity pulses having a delay between pulses of the series of single polarity pulses, wherein the delay is shorter than a second delay associated with the plurality of access pulses.

6. The method of claim 4 , wherein configuring the plurality of pulses comprises:

generating a series of pulses having a delay between a first pulse and a second pulse that is different than a delay between a third pulse and a fourth pulse.

7. The method of claim 4 , wherein configuring the plurality of pulses comprises:

generating a series of pulses comprising a first subset of pulses having a first polarity and a second subset of pulses having a second polarity that is different than the first polarity.

8. The method of claim 4 , wherein configuring the plurality of pulses comprises:

generating a series of pulses having a delay between pulses of the series of pulses based at least in part on a type of access pulse associated with the plurality of access pulses, wherein the type of access pulse is one of a write logic 0 or write logic 1.

9. The method of claim 8 , wherein the delay between pulses of the series of pulses is different than a delay between pulses of the plurality of access pulses.

10. The method of claim 4 , wherein configuring the plurality of pulses comprises:

determining a magnitude of a pulse of the plurality of pulses based at least in part on a type of access pulse associated with the plurality of access pulses, wherein the type of access pulse is a write logic 0 or a write logic 1.

11. The method of claim 4 , wherein monitoring the remnant polarization of the memory cell comprises:

determining a second peak in the remnant polarization of the memory cell as a function of a number of the applied plurality of pulses.

12. The method of claim 11 , wherein determining the second peak magnitude in the remnant polarization comprises:

detecting a decrease in the remnant polarization of the memory cell compared to a previous remnant polarization of the memory cell monitored in the recovery state.

13. The method of claim 4 , wherein terminating the plurality of pulses comprises:

determining that the remnant polarization of the memory cell is greater than the first peak magnitude during monitoring of the remnant polarization in the recovery state.

14. The method of claim 4 , wherein terminating the plurality of pulses comprises:

determining the second peak magnitude in the remnant polarization of the memory cell as a function of a number of the applied plurality of pulses, wherein the second peak magnitude is larger than the first peak magnitude.

15. The method of claim 4 , wherein a second time duration associated with the plurality of pulses as a whole is a fraction of a first time duration associated with the plurality of access pulses as a whole.

16. A method of operating a memory array, comprising:

applying a plurality of access pulses to a memory cell of the memory array;

determining a sampling frequency based at least in part on a delay between at least two access pulses of the plurality of access pulses;

determining a first peak magnitude of a remnant polarization of the memory cell as a function of a number of the applied plurality of access pulses, wherein the remnant polarization is monitored based at least in part on the sampling frequency;

configuring a plurality of recovery pulses based at least in part on the first peak magnitude;

applying the configured plurality of recovery pulses to the memory cell;

determining a second peak magnitude of the remnant polarization of the memory cell; and

terminating the application of the plurality of recovery pulses based at least in part on determining the second peak magnitude.

17. The method of claim 16 , further comprising:

determining a fatigue state of the memory cell based at least in part on the first peak magnitude of the remnant polarization.

18. The method of claim 16 , further comprising:

determining a recovery state completion based at least in part on the second peak magnitude of the remnant polarization.

19. An electronic memory apparatus, comprising:

a memory cell; and

a controller in electronic communication with the memory cell, wherein the controller is operable to:

apply a plurality of access pulses to the memory cell;

determine a sampling frequency based at least in part on a delay between at least two access pulses of the plurality of access pulses;

determine a first peak magnitude of a remnant polarization of the memory cell, wherein the remnant polarization is monitored based at least in part on the sampling frequency;

apply a plurality of recovery pulses to the memory cell based at least in part on the determined first peak magnitude; and

terminate application of the plurality of recovery pulses based at least in part on a second peak magnitude of the remnant polarization of the memory cell.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0838 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046597/0333 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 044348/0253 →
SUPPLEMENT NO. 6 TO PATENT SECURITY AGREEMENT Recorded Nov 1, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 044653/0333 →