Light trapping in hot-electron-based infrared photodetectors

1. A photonic infrared detector comprising:

At least one metal layer having a broad-band IR absorption of over 85% and a thickness of 10-30 nm, said detector configured to enable light to make a plurality of passes within a semiconductor;

said semiconductor is a c-Si substrate and said at least one metal layer is located on a top side of said c-Si substrate; and

wherein the top surface of the c-Si substrate is periodically structured with a predetermined pitch.

2. The detector of claim 1 , wherein a dielectric is opposingly located from said metal layer, said dielectric reduces absorption on a bottom side of the detector.

3. The detector of claim 1 , wherein a dielectric is opposingly located from said metal layer, said dielectric is located between a metal back reflector and the c-Si substrate, said dielectric reduces absorption on the bottom side of a detector.

4. The detector of claim 1 wherein said dielectric is SiO 2 .

5. The detector of claim 4 wherein said dielectric electronically passivates a bottom and one or more side surface(s) of the c-Si substrate to reduce charge carrier recombinations.

6. The detector of claim 1 wherein said metal layer is configured to admit incident light into the c-Si substrate and prevent light from leaking out of the c-Si substrate.

7. The detector of claim 1 said metal layer has thereon an antireflection coating that reduces reflection at the top surface.

8. The detector of claim 1 wherein the top surface of the the c-Si substrate is structured to form an array of pyramidal dips.

9. The detector of claim 1 wherein the top surface of the the c-Si substrate is structured to form an array of peaks.

10. The detector of claim 1 wherein the top surface of the c-Si substrate is periodically structured with a pitch on the order of a micrometer.

11. The detector of claim 1 further including a metal interface between said c-Si substrate and said metal layer, a Schottky barrier height at said metal interface is approximately 0.5 eV to allow photons with energies higher than 0.5 eV to be injected into said c-Si substrate to generate electrical currents.

12. The detector of claim 11 wherein said metal layer interface is aluminum, chromium, or gold to modify the Schottky barrier height to 0.08, 0.26 or 0.79 eV, respectively.

13. The detector of claim 12 further including an active layer.

14. The detector of claim 1 wherein the pitch of the structure is shorter than an IR wavelength to be detected to allow for multiple diffraction modes.

15. A photonic infrared detector comprising:

at least one metal layer having a broad-band IR absorption of over 85% and a thickness of 10-30 nm, said detector configured to enable light to make a plurality of passe within a semiconductor, and wherein said metal layer is comprised of a 1-nm-thick titanium interface layer and a 15-nm-thick gold active layer.

16. A method of creating a plurality of light passes in a photonic infrared detector comprising the steps of:

providing a detector comprised of a c-Si substrate having a structured top surface, bottom surface and side surfaces;

said side and bottom surfaces having a passivation layer;

said bottom surface further including a back reflector;

said structured top surface configured in an array of inverted pyramids having a pitch that is less than a wavelength of IR to be detected;

said structured top surface having an interface layer thereon;

an active layer on said interface layer;

an antireflection layer on said active layer; and

incident light passes through said structured top surface and is absorbed by said active layer or is transmitted into said substrate and reflected towards said active layer for absorption by said back reflector.