Semiconductor device and manufacturing method thereof
A semiconductor device includes a wiring substrate having a first surface, a stacked body on the first surface, the stacked body comprising a first chip, a second chip having a through via and positioned between the first chip and the first surface, and a third chip, a first resin contacting the first surface and the third chip, and a second resin sealing the stacked body. The first and second resins are made of different materials.
1. A semiconductor device, comprising:
a wiring substrate comprising a first surface;
a stacked body on the first surface, the stacked body comprising a first chip, a second chip between the first chip and the first surface, and a third chip between the second chip and the first surface;
a first resin contacting the first surface and the third chip;
a second resin sealing the stacked body; and
a third resin located between the wiring substrate and the second chip and directly contacting the first surface and the second chip, wherein
the second chip has a through via extending therethrough,
a portion of the second resin is between the wiring substrate and the second chip,
the second resin is in contact with the first surface and the second chip,
the first and second resins are different materials, and
the second and third resins are different materials.
2. The semiconductor device of claim 1 , further comprising:
a fourth resin contacting the first chip and the second chip, wherein
the second and fourth resins are different materials.
3. The semiconductor device of claim 2 , wherein an elastic modulus of the first resin is less than an elastic modulus of the fourth resin, which is less than an elastic modulus of the second resin.
4. The semiconductor device of claim 2 , wherein a glass transition temperature of the first resin is less than a glass transition temperature of the fourth resin, which is less than a glass transition temperature of the second resin.
5. The semiconductor device of claim 2 , wherein a thermal expansion coefficient of the second resin is less than a thermal expansion coefficient of the first resin, which is less than a thermal expansion coefficient of the fourth resin.
6. The semiconductor device according to claim 1 , wherein the portion of the second resin that is located between the wiring substrate and the second chip directly contacts the first surface and the second chip.
7. The semiconductor device according to claim 1 , wherein the portion of the second resin is between the wiring substrate and the second chip along a direction orthogonal to the first surface.
8. The semiconductor device according to claim 1 , wherein the third chip is smaller in size than the second chip.
9. A semiconductor device, comprising:
a wiring substrate comprising a first surface;
a stacked body on the first surface, the stacked body comprising a first chip, a second chip between the first chip and the first surface, and a third chip between the second chip and the first surface;
a first resin contacting the first surface and the third chip;
a second resin sealing the stacked body;
a third resin located between the wiring substrate and the second chip and directly contacting the first surface and the second chip;
a first solder bump connecting the first surface of the wiring substrate and the second chip; and
a second solder bump connecting the first surface of the wiring substrate and the second chip, wherein
the second chip has a through via extending therethrough,
a portion of the second resin is between the wiring substrate and the second chip,
the second resin is in contact with the first surface and the second chip,
the first and second resins are different materials,
the second and third resins are different materials,
the third chip is between the first and second solder bumps, and
the second resin is between third chip and the first and second solder bumps.
10. The semiconductor device according to claim 9 , wherein the second resin contacts the first and second solder bumps.
11. The semiconductor device according to claim 9 , wherein the portion of the second resin that is located between the wiring substrate and the second chip directly contacts the first surface and the second chip.
12. The semiconductor device according to claim 9 , wherein the portion of the second resin is between the wiring substrate and the second chip along a direction orthogonal to the first surface.
13. The semiconductor device according to claim 9 , wherein the third chip is smaller in size than the second chip.