Optimizing Layout of Irregular Structures in Regular Layout Context
A plurality of regular wires are formed within a given chip level, each having a linear-shape with a length extending in a first direction and a width extending in a second direction perpendicular to the first direction. The plurality of regular wires are positioned according to a fixed pitch such that a distance as measured in the second direction between lengthwise centerlines of any two regular wires is an integer multiple of the fixed pitch. At least one irregular wire is formed within the given chip level and within a region bounded by the plurality of regular wires. Each irregular wire has a linear-shape with a length extending in the first direction and a width extending in the second direction. A distance as measured in the second direction between lengthwise centerlines of any irregular wire and any regular wire is not equal to an integer multiple of the fixed pitch.
1 . An integrated circuit, comprising:
a first conductive structure having a first length as measured in a first direction and a first width as measured in a second direction perpendicular to the first direction, the first conductive structure having a lengthwise centerline positioned on a first virtual line of a virtual grate, the virtual grate including a plurality of lines spaced at a uniform pitch;
a second conductive structure having a second length as measured in the first direction and a second width as measured in the second direction, the second width substantially equal to the first width, the second conductive structure having a lengthwise centerline positioned on a second virtual line of the virtual grate, the virtual grate including at least two virtual lines interposed between the first virtual line and the second virtual line;
a third conductive structure having a third length as measured in the first direction and a third width as measured in the second direction, the third width less than the second width, the third conductive structure positioned beside the second conductive structure and between the first conductive structure and the second conductive structure, the third conductive structure separated from the second conductive structure by a first spacing as measured in the second direction; and
a fourth conductive structure having a fourth length as measured in the first direction and a fourth width as measured in the second direction, the fourth width substantially equal to the third width, the fourth conductive structure positioned beside the first conductive structure and between the first conductive structure and the second conductive structure, the fourth conductive structure separated from the first conductive structure by the first spacing as measured in the second direction.
2 . The integrated circuit as recited in claim 1 , wherein a lengthwise centerline of the third conductive structure is not positioned on a virtual line of the virtual grate.
3 . The integrated circuit as recited in claim 3 , wherein a lengthwise centerline of the fourth conductive structure is not positioned on a virtual line of the virtual grate.
4 . The integrated circuit as recited in claim 1 , wherein the first length is substantially equal to the second length.
5 . The integrated circuit as recited in claim 4 , wherein the third length is substantially equal to the fourth length.
6 . The integrated circuit as recited in claim 1 , wherein the third length is substantially equal to the fourth length.
7 . The integrated circuit as recited in claim 1 , wherein the first width is at least two times the third width.
8 . The integrated circuit as recited in claim 1 , wherein the first conductive structure has a first end and a second end, wherein the second conductive structure has a first end and a second end, and wherein the first end of the first conductive structure and the first end of the second conductive structure are substantially aligned to a same location in the first direction.
9 . The integrated circuit as recited in claim 8 , wherein the third conductive structure has a first end and a second end, wherein the fourth conductive structure has a first end and a second end, and wherein the first end of the third conductive structure and the first end of the fourth conductive structure are substantially aligned to a same location in the first direction.
10 . The integrated circuit as recited in claim 1 , wherein the third conductive structure has a first end and a second end, wherein the fourth conductive structure has a first end and a second end, and wherein the first end of the third conductive structure and the first end of the fourth conductive structure are substantially aligned to a same location in the first direction.
11 . The integrated circuit as recited in claim 1 , further comprising:
a fifth conductive structure having a fifth length as measured in the first direction and a fifth width as measured in the second direction, the fifth width substantially equal to the third width, the fifth conductive structure positioned between the third conductive structure and the fourth conductive structure.
12 . The integrated circuit as recited in claim 11 , wherein the fifth conductive structure is separated from the third conductive structure by the first spacing as measured in the second direction.
13 . The integrated circuit as recited in claim 11 , wherein the fifth conductive structure is separated from the fourth conductive structure by the first spacing as measured in the second direction.
14 . The integrated circuit as recited in claim 11 , further comprising:
a sixth conductive structure having a sixth length as measured in the first direction and a sixth width as measured in the second direction, the sixth width substantially equal to the third width, the sixth conductive structure positioned between the third conductive structure and the fourth conductive structure.
15 . The integrated circuit as recited in claim 14 , wherein the fifth conductive structure is separated from the third conductive structure by the first spacing as measured in the second direction, and wherein the sixth conductive structure is separated from the fourth conductive structure by the first spacing as measured in the second direction.
16 . The integrated circuit as recited in claim 15 , wherein the first conductive structure has a first end and a second end, wherein the second conductive structure has a first end and a second end, and wherein the first end of the first conductive structure and the first end of the second conductive structure are substantially aligned to a same location in the first direction.
17 . The integrated circuit as recited in claim 16 , wherein the third conductive structure has a first end and a second end, wherein the fourth conductive structure has a first end and a second end, and wherein the first end of the third conductive structure and the first end of the fourth conductive structure are substantially aligned to a same location in the first direction.
18 . The integrated circuit as recited in claim 17 , wherein the fifth conductive structure has a first end and a second end, wherein the sixth conductive structure has a first end and a second end, and wherein the first end of the fifth conductive structure and the first end of the sixth conductive structure are substantially aligned to a same location in the first direction.
19 . The integrated circuit as recited in claim 15 , further comprising:
a seventh conductive structure having a seventh length as measured in the first direction and a seventh width as measured in the second direction, the seventh width substantially equal to the third width, the seventh conductive structure positioned between the fifth conductive structure and the sixth conductive structure.
20 . The integrated circuit as recited in claim 19 , wherein the seventh conductive structure is separated from the fifth conductive structure by the first spacing as measured in the second direction, or the seventh conductive structure is separated from the sixth conductive structure by the first spacing as measured in the second direction.
21 . A method for manufacturing an integrated circuit, comprising:
forming a first conductive structure having a first length as measured in a first direction and a first width as measured in a second direction perpendicular to the first direction, the first conductive structure having a lengthwise centerline positioned on a first virtual line of a virtual grate, the virtual grate including a plurality of lines spaced at a uniform pitch;
forming a second conductive structure having a second length as measured in the first direction and a second width as measured in the second direction, the second width substantially equal to the first width, the second conductive structure having a lengthwise centerline positioned on a second virtual line of the virtual grate, the virtual grate including at least two virtual lines interposed between the first virtual line and the second virtual line;
forming a third conductive structure having a third length as measured in the first direction and a third width as measured in the second direction, the third width less than the second width, the third conductive structure positioned beside the second conductive structure and between the first conductive structure and the second conductive structure, the third conductive structure separated from the second conductive structure by a first spacing as measured in the second direction; and
forming a fourth conductive structure having a fourth length as measured in the first direction and a fourth width as measured in the second direction, the fourth width substantially equal to the third width, the fourth conductive structure positioned beside the first conductive structure and between the first conductive structure and the second conductive structure, the fourth conductive structure separated from the first conductive structure by the first spacing as measured in the second direction.